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TDA9851 データシート(PDF) 10 Page - NXP Semiconductors |
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TDA9851 データシート(HTML) 10 Page - NXP Semiconductors |
10 / 20 page 1997 Nov 12 10 Philips Semiconductors Product specification I2C-bus controlled economic BTSC stereo decoder TDA9851 I2C-BUS PROTOCOL I2C-bus format to read (slave transmits data) Table 1 Explanation of I2C-bus format to read (slave transmits data) Table 2 Definition of the transmitted bytes after read condition Table 3 Function of the bits in Table 2 I2C-bus format to write (slave receives data) Table 4 Explanation of I2C-bus format to write (slave receives data) Table 5 Definition of the DATA (second byte after MAD) S SLAVE ADDRESS R/W A DATA P NAME DESCRIPTION S START condition; generated by the master Standard SLAVE ADDRESS (MAD) 101 101 1 R/W logic 1 (read); generated by the master A acknowledge; generated by the slave DATA slave transmits an 8-bit data word P STOP condition; generated by the master MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 YYYYYYY STP BITS FUNCTION STP stereo pilot identification (stereo received = 1) Y indefinite S SLAVE ADDRESS R/W A DATA A P NAME DESCRIPTION S START condition Standard SLAVE ADDRESS (MAD) 101 101 1 R/W logic 0 (write) A acknowledge; generated by the slave DATA see Table 5 P STOP condition MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 0 0 AT2 AT1 CCD AVLON GMU STEREO |
同様の部品番号 - TDA9851 |
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同様の説明 - TDA9851 |
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