2

DS618PP2

CS4382A

TABLE OF CONTENTS

1. PIN DESCRIPTION ................................................................................................................................. 6

2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8

3. TYPICAL CONNECTION DIAGRAM

.............................................................................. 18

4. APPLICATIONS ................................................................................................................................... 20

4.1 Master Clock ................................................................................................................................... 20

4.2 Mode Select .................................................................................................................................... 20

4.3 Digital Interface Formats ................................................................................................................ 22

4.4 Oversampling Modes ...................................................................................................................... 23

4.5 Interpolation Filter ........................................................................................................................... 23

4.6 De-Emphasis .................................................................................................................................. 23

4.7 ATAPI Specification ........................................................................................................................ 24

4.8 Direct Stream Digital (DSD) Mode .................................................................................................. 25

4.9 Grounding and Power Supply Arrangements ................................................................................. 25

4.9.1 Capacitor Placement ............................................................................................................. 25

4.10 Analog Output and Filtering .......................................................................................................... 25

4.11 Mute Control ................................................................................................................................. 26

4.12 Recommended Power-Up Sequence ........................................................................................... 27

4.12.1 Hardware Mode ................................................................................................................... 27

4.12.2 Software Mode .................................................................................................................... 27

4.13 Recommended Procedure for Switching Operational Modes ....................................................... 27

4.14 Control Port Interface ................................................................................................................... 27

4.14.1 MAP Auto Increment ........................................................................................................... 28

4.14.2 I²C Mode .............................................................................................................................. 28

4.14.2.1 I²C Write ................................................................................................................... 28

4.14.2.2 I²C Read .................................................................................................................. 28

4.14.3 SPI™ Mode ......................................................................................................................... 29

4.14.3.1 SPI Write .................................................................................................................. 29

4.15 Memory Address Pointer (MAP)

............................................................................................. 30

4.16 INCR (Auto Map Increment Enable) ............................................................................................. 30

4.16.1 MAP4-0 (Memory Address Pointer) .................................................................................... 30

5. REGISTER QUICK REFERENCE ........................................................................................................ 31

6. REGISTER DESCRIPTION .................................................................................................................. 32

6.1 Mode Control 1 (address 01h) ........................................................................................................ 32

6.1.1 Control Port Enable (CPEN) .................................................................................................. 32

6.1.2 Freeze Controls (Freeze) ...................................................................................................... 32

6.1.3 Master Clock DIVIDE ENABLE (mclkdiv) .............................................................................. 32

6.1.4 DAC Pair Disable (DACx_DIS) ..............................................................................................32

6.1.5 Power Down (PDN) ............................................................................................................... 33

6.2 Mode Control 2 (address 02h) ....................................................................................................... 33

6.2.1 Digital Interface Format (dif) .................................................................................................. 33

6.2.2 Mode Control 3 (address 03h) .............................................................................................. 34

6.2.3 Soft Ramp and Zero Cross CONTROL (SZC) ...................................................................... 34

6.2.4 Single Volume Control (Snglvol) ........................................................................................... 34

6.2.5 Soft Volume Ramp-Up after Error (RMP_UP) ....................................................................... 35

6.2.6 MUTEC Polarity (MUTEC+/-) ................................................................................................35

6.2.7 Auto-Mute (AMUTE) ............................................................................................................. 35

6.3 Mutec Pin Control (MUTEC) ........................................................................................................... 35

6.4 Filter Control (address 04h) ........................................................................................................... 36

6.4.1 Interpolation Filter Select (FILT_SEL) ...................................................................................36

6.4.2 De-Emphasis Control (DEM) ................................................................................................. 36

6.4.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ..................................................... 36

6.5 Invert Control (address 05h) .......................................................................................................... 37