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AD62551A データシート(PDF) 3 Page - Elite Semiconductor Memory Technology Inc. |
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AD62551A データシート(HTML) 3 Page - Elite Semiconductor Memory Technology Inc. |
3 / 3 page ESMT AD62551A Elite Semiconductor Memory Technology Inc. Publication Date: Apr. 2007 Revision: 1.2 3/10 13 VDD P 5V supply voltage 14 NC NC No connection 15 NC NC No connection 16 GND P Ground 17 S /I USB 2 I Low is USB mode, high is I 2S mode Schmitt trigger TTL input buffer 18 NC NC No connection 19 SEL I Mode selection bit Schmitt trigger TTL input buffer 20 XO O Crystal output 21 XI I Crystal input 22 GND P Ground 23 REGO O 3.3V regulator output 24 VDD P 5V supply voltage 25 USBDM I/O USB data D- 26 USBDP I/O USB data D+ 27 GND P Ground 28 VOLDN I Volume down, low active With internal pull-up resistor 29 VOLUP I Volume up, low active With internal pull-up resistor 30 MUTE I Power-down and mute of Class D Schmitt trigger TTL input buffer 31 ERROR O Error output Open-Drain output 32 RESET I Reset signal Schmitt trigger TTL input buffer Note1: Must be strapped resistor 1M Ω to 3.3V(REGO) or GND. BCLK, LRCIN and PDO must be strapped to GND. SDATAO is strapped to GND when AD62551A is button mode, otherwise strapped to 3.3V when AD62551A is I 2C slave mode. Absolute Maximum Ratings Symbol Parameter Min Max Units VDD Supply for regulator input 0 5.5 V Vi Input Voltage -0.3 3.6 V Tstg Storage Temperature -65 150 oC Ta Ambient Operating Temperature 0 70 oC Recommended Operating Conditions Symbol Parameter Typ Units VDD Supply for regulator input 4.5~5.5 V Ta Ambient Operating Temperature 0~70 oC |
同様の部品番号 - AD62551A |
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同様の説明 - AD62551A |
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