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BCP51 データシート(PDF) 1 Page - Diotec Semiconductor

部品番号 BCP51
部品情報  Surface Mount General Purpose Si-Epi-Planar Transistors
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メーカー  DIOTEC [Diotec Semiconductor]
ホームページ  http://www.diotec.com
Logo DIOTEC - Diotec Semiconductor

BCP51 データシート(HTML) 1 Page - Diotec Semiconductor

  BCP51_07 Datasheet HTML 1Page - Diotec Semiconductor BCP51_07 Datasheet HTML 2Page - Diotec Semiconductor  
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BCP51 ... BCP53
BCP51 ... BCP53
PNP
Surface Mount General Purpose Si-Epi-Planar Transistors
Si-Epi-Planar Universaltransistoren für die Oberflächenmontage
PNP
Version 2006-06-26
Dimensions - Maße [mm]
1 = B
2/4 = C
3 = E
Power dissipation
Verlustleistung
1.3 W
Plastic case
Kunststoffgehäuse
SOT-223
Weight approx.
Gewicht ca.
0.04 g
Plastic material has UL classification 94V-0
Gehäusematerial UL94V-0 klassifiziert
Standard packaging taped and reeled
Standard Lieferform gegurtet auf Rolle
Maximum ratings (TA = 25°C)
Grenzwerte (TA = 25°C)
BCP51
BCP52
BCP53
Collector-Emitter-volt. – Kollektor-Emitter-Spannung
B open
- VCEO
45 V
60 V
80 V
Collector-Base-voltage – Kollektor-Basis-Spannung
E open
- VCBO
45 V
60 V
100 V
Collector-Base-voltage – Kollektor-Basis-Spannung
C open
- VEBO
5 V
Power dissipation – Verlustleistung
Ptot
1.3 W 1)
Collector current – Kollektorstrom (dc)
- IC
1 A
Peak Collector current – Kollektor-Spitzenstrom
- ICM
1.5 A
Peak Base current – Basis-Spitzenstrom
- IBM
200 mA
Junction temperature – Sperrschichttemperatur
Storage temperature – Lagerungstemperatur
Tj
TS
-55...+150°C
-55…+150°C
Characteristics (Tj = 25°C)
Kennwerte (Tj = 25°C)
Min.
Typ.
Max.
DC current gain – Kollektor-Basis-Stromverhältnis 2)
- VCE = 2 V, - IC = 5 mA
all groups
hFE
25
- VCE = 2 V, - IC = 150 mA
Group -6
Group -10
Group -16
hFE
hFE
hFE
40
63
100
100
160
250
- VCE = 2 V, - IC = 500 mA
all groups
hFE
25
Collector-Emitter saturation voltage – Kollektor-Emitter-Sättigungsspg. 2)
- IC = 500 mA, - IB = 50 mA
- VCEsat
0.5 V
Base-Emitter voltage – Basis-Emitter-Spannung 2)
- IC = 500 mA, - IB = 50 mA
- VBE
––
1 V
1
Mounted on P.C. board with 3 mm2 copper pad at each terminal
Montage auf Leiterplatte mit 3 mm2 Kupferbelag (Lötpad) an jedem Anschluss
2
Tested with pulses tp = 300 µs, duty cycle ≤ 2% – Gemessen mit Impulsen tp = 300 µs, Schaltverhältnis ≤ 2%
© Diotec Semiconductor AG
http://www.diotec.com/
1
1.65
2.3
3.25
0.7
6.5
±0.2
3
±0.1
1
2
3
4
Type
Code


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