74VHC112SJ datasheet(3/9 Pages) FAIRCHILD

部品番号	74VHC112SJ

部品情報	Dual J-K Flip-Flops with Preset and Clear

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74VHC112 Rev. 1.2

3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Recommended Operating Conditions(1)

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Note:

1. Unused inputs must be held HIGH or LOW. They may not float.

Symbol

Parameter

Rating

VCC

Supply Voltage

–0.5V to +7.0V

VIN

DC Input Voltage

–0.5V to +7.0V

VOUT

DC Output Voltage

–0.5V to VCC + 0.5V

IIK

Input Diode Current

–20mA

IOK

Output Diode Current

±20mA

IOUT

DC Output Current

±25mA

ICC

DC VCC / GND Current

±50mA

TSTG

Storage Temperature

–65°C to +150°C

TL

Lead Temperature (Soldering, 10 seconds)

260°C

Symbol

Parameter

Rating

VCC

Supply Voltage

2.0V to +5.5V

VIN

Input Voltage

0V to +5.5V

VOUT

Output Voltage

0V to VCC

TOPR

Operating Temperature

–40°C to +85°C

tr, tf

Input Rise and Fall Time,

VCC = 3.3V ± 0.3V

VCC = 5.0V ± 0.5V

0ns/V

∼ 100ns/V

0ns/V

∼ 20ns/V

同様の部品番号 - 74VHC112SJ

メーカー	部品番号	データシート	部品情報
Fairchild Semiconductor	74VHC112SJ	70Kb / 7P	Dual J-K Flip-Flops with Preset and Clear
ON Semiconductor	74VHC112SJ	350Kb / 11P	Dual J-K Flip-Flops with Preset and Clear May 2007 Rev. 1.2

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