74LVC1G384GW datasheet(10/22 Pages) NXP

部品番号	74LVC1G384GW

部品情報	Bilateral switch

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10 / 22 page

74LVC1G384_2

Product data sheet

Rev. 02 — 29 August 2007

10 of 22

NXP Semiconductors

74LVC1G384

Bilateral switch

[1]

Typical values are measured at Tamb =25 °C and nominal VCC.

[2]

tpd is the same as tPLH and tPHL.

[3]

propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the speciﬁed capacitance when

driven by an ideal voltage source (zero output impedance).

[4]

ten is the same as tPZH and tPZL.

[5]

tdis is the same as tPLZ and tPHZ.

[6]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ{(CL +CS(ON)) × VCC2 × fo} where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

CS(ON) = maximum ON-state switch capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ{(C

L +CS(ON)) × VCC

2

× f

o} = sum of the outputs.

11.1 Waveforms and test circuit

tdis

disable time

E to Y or Z; see Figure 17

[5]

VCC = 1.65 V to 1.95 V

1.0

7.4

10.0

1.0

13.0

ns

VCC = 2.3 V to 2.7 V

1.0

4.1

6.9

1.0

9.0

ns

VCC = 2.7 V

1.0

4.9

7.5

1.0

9.5

ns

VCC = 3.0 V to 3.6 V

1.0

5.4

6.5

1.0

8.5

ns

VCC = 4.5 V to 5.5 V

1.0

3.6

5.0

1.0

6.5

ns

CPD

power dissipation

capacitance

CL = 50 pF; fi = 10 MHz;

VI = GND to VCC

[6]

VCC = 2.5 V

-

13.7

-

pF

VCC = 3.3 V

-

15.2

-

pF

VCC = 5.0 V

-

18.3

-

pF

Table 9.

Dynamic characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 18.

Symbol Parameter

Conditions

−40 °C to +85 °C

−40 °C to +125 °C Unit

Min

Typ[1]

Max

Min

Max

Measurement points are given in Table 10.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 16. Input (Y or Z) to output (Z or Y) propagation delays

mna667

tPLH

tPHL

VM

Y or Z input

Z or Y output

GND

VI

VOH

VOL

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