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74LVC1G3157GM データシート(PDF) 11 Page - NXP Semiconductors |
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74LVC1G3157GM データシート(HTML) 11 Page - NXP Semiconductors |
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11 / 22 page  74LVC1G3157_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 18 September 2007 11 of 22 NXP Semiconductors 74LVC1G3157 2-channel analog multiplexer/demultiplexer 11.1 Waveforms and test circuits Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 15. Input (Yn or Z) to output (Z or Yn) propagation delays tPLH tPHL VM VM VM VM GND VI VOH VOL Yn or Z input Z or Yn output 001aac361 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 16. Enable and disable times tPLZ tPHZ switch disabled switch enabled switch enabled output LOW to OFF OFF to LOW output HIGH to OFF OFF to HIGH S input Yn Yn VI VOL VOH VCC VM VM VX VY VM GND GND tPZL tPZH 001aac362 Table 10. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 5.5 V 0.5VCC 0.5VCC VOL + 0.3 V VOH − 0.3 V |
同様の部品番号 - 74LVC1G3157GM |
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同様の説明 - 74LVC1G3157GM |
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