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LM1203A データシート(PDF) 10 Page - National Semiconductor (TI) |
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LM1203A データシート(HTML) 10 Page - National Semiconductor (TI) |
10 / 18 page Circuit Description (Continued) INPUT REFERENCE AND CONTRAST CONTROL SECTION Figure 7 shows the input reference and contrast control cir- cuitry A temperature compensated 28V reference voltage is made available at pin 11 The external DC biasing resis- tors shown should not be larger than 10k because minor differences in input bias currents of the individual video am- plifiers may cause offsets in gain Figure 7 also shows how the contrast control circuit is configured R21 R22 Q22 Q23 and Q24 establish a low impedance zero TC half sup- ply voltage reference at the base of Q25 The differential amplifier formed by Q27 Q28 and feedback transistor Q29 along with R28 and R29 establish a differential base voltage for Q3 and Q4 in Figure 6 When externally adding or sub- tracting current from the collector of Q28 a new differential voltage is generated that reflects the change in the ratio of currents in Q27 and Q28 To allow voltage control of the current through Q28 resistor R27 is added between the collector Q28 and pin 12 A capacitor should be connected from pin 12 to ground to prevent noise from the contrast control potentiometer from entering the IC CLAMP GATE AND CLAMP COMPARATOR SECTION Figures 8 and 9 show simplified schematics of the clamp gate and clamp comparator circuits The clamp gate circuit (Figure 8) consists of a PNP input buffer transistor (Q46) a PNP emitter coupled pair (Q47 and Q49) referenced on one side to 21V and an output switch transistor Q53 When the clamp gate input at pin 14 is high (l15V) the Q53 switch is on and shunts the 200 mA current from current source Q54 to ground When pin 14 is low (k13V) the Q53 switch is off and the 200 mA current is mirrored by the current mirror comprised of Q55 and Q36 (see Figure 9 ) Consequently the clamp comparator comprised of the differential pair Q35 and Q37 is enabled The input of each clamp comparator is similar to the clamp gate except than an NPN emitter cou- pled pair is used to control the current that will charge or discharge the clamp capacitors at pins 5 8 and 10 PNP transistors are used at the inputs because they offer a num- ber of advantages over NPNs PNPs will operate with base voltages at or near ground and will usually have a greater emitter base breakdown voltage (BVebo) Because the dif- ferential input voltage to the clamp comparator during the video scan period could be greater than the BVebo of NPN transistors a resistor (R37) with a value one half that of R36 or R39 is connected between the bases of Q34 and Q38 The clamp comparator’s common mode range is from ground to approximately 9V and the maximum differential input voltage is VCC and ground TLH11441 – 11 FIGURE 7 Simplified Schematic of LM1203A Video Input Reference and Contrast Control Circuits http www nationalcom 10 |
同様の部品番号 - LM1203A |
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同様の説明 - LM1203A |
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