データシートサーチシステム |
|
74VHCT08AM データシート(PDF) 1 Page - STMicroelectronics |
|
74VHCT08AM データシート(HTML) 1 Page - STMicroelectronics |
1 / 7 page 74VHCT08A QUAD 2-INPUT AND GATE ® August 1999 s HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA =25 oC s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS & OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 08 s IMPROVED LATCH-UP IMMUNITY s LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHCT08A is an advanced high-speed CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES : 74VHCT08AM 74VHCT08AT M (Micro Package) T (TSSOP Package) 1/7 |
同様の部品番号 - 74VHCT08AM |
|
同様の説明 - 74VHCT08AM |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |