©1988 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74AC374, 74ACT374 Rev. 1.5.0

2

Connection Diagram

Pin Description

Functional Description

The AC/ACT374 consists of eight edge-triggered flip-

flops with individual D-type inputs and 3-STATE true out-

puts. The buffered clock and buffered Output Enable are

common to all flip-flops. The eight flip-flops will store the

state of their individual D inputs that meet the setup and

hold time requirements on the LOW-to-HIGH Clock (CP)

transition. With the Output Enable (OE) LOW, the con-

tents of the eight flip-flops are available at the outputs.

When the OE is HIGH, the outputs go to the high imped-

ance state. Operation of the OE input does not affect the

state of the flip-flops.

Logic Symbols

IEEE/IEC

Truth Table

H

= HIGH Voltage Level

L

= LOW Voltage Level

X

= Immaterial

Z

= High Impedance

= LOW-to-HIGH Transition

Pin

Names

Description

Data Inputs

CP

Clock Pulse Input

OE

3-STATE Output Enable Input

3-STATE Outputs

Inputs

Outputs

CP

OE

HL

H

LL

L

XX

H

Z