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AD6653-150EBZ データシート(PDF) 5 Page - Analog Devices |
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AD6653-150EBZ データシート(HTML) 5 Page - Analog Devices |
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5 / 80 page  AD6653 Rev. 0 | Page 5 of 80 SPECIFICATIONS ADC DC SPECIFICATIONS AVDD = 1.8 V, DVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless otherwise noted. Table 1. AD6653BCPZ-125 AD6653BCPZ-150 Parameter Temperature Min Typ Max Min Typ Max Unit RESOLUTION Full 12 12 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Offset Error Full ±0.3 ±0.6 ±0.2 ±0.6 % FSR Gain Error Full −3.9 −2.7 −0.7 −5.2 −3.2 −0.9 % FSR MATCHING CHARACTERISTIC Offset Error 25°C ±0.3 ±0.6 ±0.2 ±0.7 % FSR Gain Error 25°C ±0.1 ±0.7 ±0.2 ±0.7 % FSR TEMPERATURE DRIFT Offset Error Full ±19 ±17 ppm/°C Gain Error Full ±38 ±49 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1 V Mode) Full ±5 ±18 ±5 ±18 mV Load Regulation @ 1.0 mA Full 7 7 mV INPUT-REFERRED NOISE VREF = 1.0 V 25°C 0.21 0.21 LSB rms ANALOG INPUT Input Span, VREF = 1.0 V Full 2 2 V p-p Input Capacitance1 Full 8 8 pF VREF INPUT RESISTANCE Full 6 6 kΩ POWER SUPPLIES Supply Voltage AVDD, DVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 V DRVDD (CMOS Mode) Full 1.7 3.3 3.6 1.7 3.3 3.6 V DRVDD (LVDS Mode) Full 1.7 1.8 1.9 1.7 1.8 1.9 V Supply Current IAVDD2,3 Full 390 440 mA IDVDD2, 3 Full 270 689 320 785 mA IDRVDD2 (3.3 V CMOS) Full 20 24 mA IDRVDD2 (1.8 V CMOS) Full 12 15 mA IDRVDD2 (1.8 V LVDS) Full 57 57 mA POWER CONSUMPTION DC Input Full 770 800 870 905 mW Sine Wave Input2 (DRVDD = 1.8 V) Full 1215 1395 mW Sine Wave Input2 (DRVDD = 3.3 V) Full 1275 1450 mW Standby Power4 Full 77 77 mW Power-Down Power Full 2.5 8 2.5 8 mW 1 Input capacitance refers to the effective capacitance between one differential input pin and AGND. See Figure 11 for the equivalent analog input structure. 2 Measured with a 9.7 MHz, full-scale sine wave input, NCO enabled with a frequency of 13 MHz, FIR filter enabled and the fS/8 output mix enabled with approximately 5 pF loading on each output bit. 3 The maximum limit applies to the combination of IAVDD and IDVDD currents. 4 Standby power is measured with a dc input and with the CLK pin inactive (set to AVDD or AGND). |
同様の部品番号 - AD6653-150EBZ |
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同様の説明 - AD6653-150EBZ |
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