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ADE8052Z-EMUL1 データシート(PDF) 41 Page - Analog Devices |
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ADE8052Z-EMUL1 データシート(HTML) 41 Page - Analog Devices |
41 / 144 page ADE7566/ADE7569/ADE7166/ADE7169 Rev. A | Page 41 of 144 Address MADDPT[6:0] Mnemonic R/W Length (Bits) Signed/ Unsigned Default Description 0x26 VADIV R/W 8 U 0 Sets VA energy scaling register. 0x27 CF1NUM R/W 16 U 0 Sets CF1 numerator register. 0x28 CF1DEN R/W 16 U 0x003F Sets CF1 denominator register. 0x29 CF2NUM R/W 16 U 0 Sets CF2 numerator register. 0x2A CF2DEN R/W 16 U 0x003F Sets CF2 denominator register. 0x3B Reserved 0 This register must be kept at its default value for proper operation. 0x3C Reserved 0x0300 This register must be kept at its default value for proper operation. 0x3D CALMODE2 R/W 8 U 0 For ADE7166/ADE7169 only. Set Calibration mode. 0x3E Reserved 0 This register must be kept at its default value for proper operation. 0x3F Reserved 0 This register must be kept at its default value for proper operation. 1 This function is not available in the ADE7566 and ADE7166. 2 This function is not available in the ADE7566 and ADE7569. ENERGY MEASUREMENT INTERNAL REGISTERS DETAILS Table 32. MODE1 Register (0x0B) Bit Mnemonic Default Description 7 SWRST 0 Setting this bit resets all of the energy measurement registers to their default values. 6 DISZXLPF 0 Setting this bit disables the zero-crossing low-pass filter. 5 INTE 0 Setting this bit enables the digital integrator for use with a di/dt sensor. 4 SWAPBITS 0 Setting this bit swaps CH1 ADC and CH2 ADC. 3 PWRDN 0 Setting this bit powers down voltage and current ADCs. 2 DISCF2 1 Setting this bit disables Frequency Output CF2. 1 DISCF1 1 Setting this bit disables Frequency Output CF1. 0 DISHPF 0 Setting this bit disables the HPFs in voltage and current channels. Table 33. MODE2 Register (0x0C) Bit Mnemonic Default Description Configuration Bits for CF2 Output. CF2SEL[1:0] Result 00 CF2 frequency is proportional to active power. 01 CF2 frequency is proportional to reactive power.1 7 to 6 CF2SEL[1:0] 01 1x CF2 frequency is proportional to apparent power or Irms. 5 to 4 CF1SEL[1:0] 00 Configuration Bits for CF1 Output. CF1SEL[1:0] Result 00 CF1 frequency is proportional to active power. 01 CF1 frequency is proportional to reactive power.1 1x CF1 frequency is proportional to apparent power or Irms. 3 VARMSCFCON 0 Configuration Bits for Apparent Power or Irms for CF1, CF2 Outputs, and VA Accumulation Registers (VAHR, RVAHR, and LVAHR). Note that CF1 cannot be proportional to VA if CF2 is proportional to Irms and vice versa. VARMSCFCON Result 0 If CF1SEL[1:0] = 1x, CF1 is proportional to VA. If CF2SEL[1:0] = 1x, CF2 is proportional to VA. 1 If CF1SEL[1:0] = 1x, CF1 is proportional to Irms. If CF2SEL[1:0] = 1x, CF2 is proportional to Irms. 2 ZXRMS 0 Logic 1 enables update of rms values synchronously to Voltage ZX. |
同様の部品番号 - ADE8052Z-EMUL1 |
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同様の説明 - ADE8052Z-EMUL1 |
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