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AD8042AN データシート(PDF) 6 Page - Analog Devices

部品番号 AD8042AN
部品情報  Dual 160 MHz Rail-to-Rail Amplifier
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD8042AN データシート(HTML) 6 Page - Analog Devices

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AD8042
Rev. E | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
Supply Voltage
12.6 V
Internal Power Dissipation1
8-Lead PDIP (N)
1.3 W
8-Lead SOIC_N (R)
0.9 W
Input Voltage (Common Mode)
±VS ± 0.5 V
Differential Input Voltage
±3.4 V
Output Short-Circuit Duration
Observe Power
Derating Curves
Storage Temperature Range (N, R)
−65°C to +125°C
Lead Temperature (Soldering, 10 sec)
300°C
1 Specification is for the device in free air:
8-Lead PDIP: θJA = 90°C/W
8-Lead SOIC_N: θJA = 155°C/W.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8042 is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsulated
devices is determined by the glass transition temperature of the
plastic, approximately 150°C. Exceeding this limit temporarily
can cause a shift in parametric performance due to a change in
the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
While the AD8042 is internally short-circuit protected, this
may not be sufficient to guarantee that the maximum junction
temperature (150°C) is not exceeded under all conditions. To
ensure proper operation, it is necessary to observe the
maximum power derating curves.
2.0
1.5
1.0
0.5
0
–50
90
80
70
60
50
40
30
20
10
0
–10
–20
–30
–40
AMBIENT TEMPERATURE (°C)
8-LEAD PLASTIC-DIP PACKAGE
8-LEAD SOIC PACKAGE
TJ = 150°C
Figure 4. Maximum Power Dissipation vs. Temperature
ESD CAUTION


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