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L6918DTR データシート(PDF) 7 Page - STMicroelectronics |
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L6918DTR データシート(HTML) 7 Page - STMicroelectronics |
7 / 35 page 7/35 L6918 L6918A 24 BOOT2 Channel 2 bootstrap capacitor pin. This pin supplies the high side driver. Connect through a capacitor to the PHASE2 pin and through a diode to Vcc (cathode vs. boot). 25 UGATE2 Channel 2 high side gate driver output. 26 PHASE2 This pin is connected to the Source of the upper mosfet and provides the return path for the high side driver of channel 2. 27 LGATE2 Channel 2 low side gate driver output. 28 PGND Power ground pin. This pin is common to both sections and it must be connected through the closest path to the low side mosfets source pins in order to reduce the noise injection into the device. ELECTRICAL CHARACTERISTCS (Vcc=12V±10%, TJ=0°C to 70°C unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit Vcc SUPPLY CURRENT ICC Vcc supply current HGATEx and LGATEx open VCCDR=VBOOT=12V 7.5 10 12.5 mA ICCDR VCCDR supply current LGATEx open; VCCDR=12V 2 3 4 mA IBOOTx Boot supply current HGATEx open; PHASEx to PGND VCC=VBOOT=12V 0.5 1 1.5 mA POWER-ON Turn-On VCC threshold VCC Rising; VCCDR=5V 7.8 9 10.2 V Turn-Off VCC threshold VCC Falling; VCCDR=5V 6.5 7.5 8.5 V Turn-On VCCDR Threshold VCCDR Rising; VCC=12V 4.2 4.4 4.6 V Turn-Off VCCDR Threshold VCCDR Falling; VCC=12V 4.0 4.2 4.4 V OSCILLATOR AND INHIBIT fOSC Initial Accuracy OSC = OPEN OSC = OPEN; Tj=0 °C to 125°C 278 270 300 322 330 kHz kHz fOSC,Rosc Total Accuracy RT to GND=74kΩ 450 500 550 kHz ∆Vosc Ramp Amplitude 2 V dMAX Maximum duty cycle OSC = OPEN 45 50 - % INH Inhibit threshold ISINK=5mA 0.8 0.85 0.9 V REFERENCE AND DAC only for L6918A (MASTER) VPROG_OUT Reference Voltage Accuracy VID0 to VID4 see Table1 -0.6 - 0.6 % IDAC VID pull-up Current VIDx = GND 4 5 6 µA VID pull-up Voltage VIDx = OPEN 3.1 - 3.4 V ERROR AMPLIFIER DC Gain 80 dB SR Slew-Rate COMP=10pF 15 V/ µS Offset -7 7 mV DIFFERENTIAL AMPLIFIER (REMOTE BUFFER) only for L6918 (SLAVE) DC Gain 1V/V CMRR Common Mode Rejection Ratio 40 dB Input Offset FBR=1.100V to1.850V; FBG=GND -12 12 mV DIFFERENTIAL CURRENT SENSING IISEN1, IISEN2 Bias Current ILOAD = 0% 45 50 55 µA L6918 (SLAVE) PIN FUNCTION (continued) N. Name Description |
同様の部品番号 - L6918DTR |
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同様の説明 - L6918DTR |
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