8

FN6461.1

September 25, 2007

Power-Supply Considerations

The construction of the ISL54054 and the ISL54055 is

typical of most single supply CMOS analog switches in that

they have two supply pins: V+ and GND. V+ and GND drive

the internal CMOS switches and set their analog voltage

limits. Unlike switches with a 4.5V maximum supply voltage,

the ISL54054 and the ISL54055’s 5.5V maximum supply

voltage provides plenty of room for the 10% tolerance of

4.5V supplies, as well as room for overshoot and noise

spikes.

The minimum recommended supply voltage is 1.8V. It is

important to note that the input signal range, switching times,

and on-resistance degrade at lower supply voltages. Refer

to the “Electrical Specifications” tables starting on page 3

and “Typical Performance Curves” on page 8 for details.

V+ and GND also power the internal logic and level shiftier.

The level shiftier converts the input logic levels to switched

V+ and GND signals to drive the analog switch gate

terminals.

This family of switches cannot be operated with bipolar

supplies, because the input switching point becomes

negative in this configuration.

Logic-Level Thresholds

This switch family is 1.8V logic compatible (0.5V and 1.4V)

over a supply range of 2.5V to 5V (see Figure 19). At 5V the

guaranteed high output minimum level of 1.4V, but noise

0.1V and can only be used in 1.8V applications with minimal

ground bounce.

The digital input stages draw supply current whenever the

digital input voltage is not at one of the supply rails. Driving

the digital input signals from GND to V+ with a fast transition

time minimizes power dissipation.

High-Frequency Performance

In 50

Ω systems, the ISL54054 and the ISL54055 have a -

3dB bandwidth of 72MHz with Nx pins connected and

138MHz for a single Nx input (see Figure 20). The frequency

response is very consistent over a wide V+ range, and for

varying analog signal levels.

An OFF switch acts like a capacitor and passes higher

frequencies with less attenuation, resulting in signal

feedthrough from a switch’s input to its output. Off isolation is

the resistance to this feedthrough. Figure 21 details the high

off isolation rejection provided by this family. At 100kHz, off

isolation in 50

Ω systems is about 74dB with Nx pins

connected and 83dB with a single Nx input, decreasing

approximately 20dB per decade as frequency increases.

Higher load impedances decrease off isolation rejection due

to the voltage divider action of the switch OFF impedance

and the load impedance.

Leakage Considerations

Reverse ESD protection diodes are internally connected

between each analog-signal pin and both V+ and GND. One of

these diodes conducts if any analog signal exceeds V+ or

GND.

Virtually all the analog leakage current comes from the ESD

diodes to V+ or GND. Although the ESD diodes on a given

signal pin are identical and therefore fairly well balanced,

they are reverse biased differently. Each is biased by either

V+ or GND and the analog signal. This means their leakages

will vary as the signal varies. The difference in the two diode

leakages to the V+ and GND pins constitutes the analog-

signal-path leakage current. All analog leakage current flows

between each pin and one of the supply terminals, not to the

other switch terminal. This is why both sides of a given

switch can show leakage currents of the same or opposite

polarity. There is no connection between the analog signal

paths and V+ or GND.

FIGURE 7. ON-RESISTANCE vs SUPPLY VOLTAGE vs

SWITCH VOLTAGE (NX PINS CONNECTED)

FIGURE 8. ON-RESISTANCE vs SWITCH VOLTAGE

(NX PINS CONNECTED)

01

2

3

4

0.2

0.3

0.4

0.5

0.6

1.2

V+ = 2.7V

V+ = 1.8V

V+ = 4.5V

V+ = 3V

V+ = 5V

5

0.7

0.8

0.9

1.0

1.1

0.2

0.4

0.6

0.8

1.0

1.2

1.4

00.5

1.0

1.5

1.8

+25°C

+85°C

-40°C

V+ = 1.8V

ISL54054, ISL54055