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L6910GTR データシート(PDF) 10 Page - STMicroelectronics |
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L6910GTR データシート(HTML) 10 Page - STMicroelectronics |
10 / 26 page L6910G 10/26 Figure 10. Compensation Network The compensation network consists in the internal error amplifier and the impedance networks ZIN (R3, R4 and C20) and ZFB (R5, C18 and C19). The compensation network has to provide a closed loop transfer function with the highest 0dB crossing frequency to have fast response (but always lower than fsw/10) and the highest gain in DC conditions to minimize the load regulation. A stable control loop has a gain crossing with -20dB/decade slope and a phase margin greater than 45°. Include worst-case component variations when determining phase margin. To locate poles and zeroes of the compensation networks, the following suggestions may be used: Modulator singularity frequencies: Compensation network singularity frequency: – Put the gain R5/R3 in order to obtain the desired converter bandwidth; – Place ωZ1 before the output filter resonance ωLC; – Place ωZ2 at the output filter resonance ωLC; – Place ωP1 at the output capacitor ESR zero ωESR; – Place ωP2 at one half of the switching frequency; – Check the loop gain considering the error amplifier open loop gain. + - L PWM COMPARATOR ESR COUT VOUT VCOMP EAREF ∆V OSC VIN R3 C19 R5 C18 C20 R4 D03IN1512 ω LC 1 LC OUT ⋅ --------------------------- ω ESR 1 ESR C OUT ⋅ --------------------------------- == ω P1 1 R5 C18 C19 ⋅ C18 C19 + ----------------------------- ⋅ ----------------------------------------------- ω P2 1 R4 C20 ⋅ ------------------------ == ω Z1 1 R5 C19 ⋅ ------------------------ ω Z2 1 R3 R4 + () C20 ⋅ ------------------------------------------- == |
同様の部品番号 - L6910GTR |
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同様の説明 - L6910GTR |
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