データシートサーチシステム |
|
M40Z300MQ1 データシート(PDF) 4 Page - STMicroelectronics |
|
M40Z300MQ1 データシート(HTML) 4 Page - STMicroelectronics |
4 / 16 page M40Z300, M40Z300W 4/16 DATA RETENTION LIFETIME CALCULATION Most low power SRAMs on the market today can be used with the M40Z300/W NVRAM Controller. There are, however some criteria which should be used in making the final choice of which SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M40Z300/W and SRAMs to be Don’t Care once VCC falls below VPFD (min). The SRAM should also guarantee data retention down to VCC = 2.0V. The chip en- able access time must be sufficient to meet the system needs with the chip enable propagation delays included. If the SRAM includes a second Chip Enable pin (E2), this pin should be tied to VOUT. If data retention lifetime is a critical parameter for the system, it is important to review the data reten- tion current specifications for the particular SRAMs being evaluated. Most SRAMs specify a data retention current at 3.0V. Manufacturers gen- erally specify a typical condition for room temper- ature along with a worst case condition (generally at elevated temperatures). The system level re- quirements will determine the choice of which val- ue to use. The data retention current value of the SRAMs can then be added to the ICCDR value of the M40Z300/W to determine the total current re- quirements for data retention. The available bat- tery capacity for the SNAPHAT of your choice can then be divided by this current to determine the amount of data retention available (see Table 8). CAUTION: Take care to avoid inadvertent dis- charge through VOUT and E1CON-E4CON after bat- tery has been attached. For a further more detailed review of lifetime cal- culations, please see Application Note AN1012. Table 3. Truth Table Inputs Outputs E BA E1CON E2CON E3CON E4CON H X X HHHH LL LL H H H L L H HLH H LH LH HLH L H HHHH L Figure 3. AC Testing Load Circuit AI02393 CL = 50pF CL includes JIG capacitance 333 Ω DEVICE UNDER TEST 1.73V Table 4. AC Measurement Conditions Input Rise and Fall Times ≤ 5ns Input Pulse Voltages 0 to 3V Input and Output Timing Ref. Voltages 1.5V |
同様の部品番号 - M40Z300MQ1 |
|
同様の説明 - M40Z300MQ1 |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |