Document No. 008-0277-0

Page 3 - 4

Rev. B

Model CB1V8

7x5mm Low Cost

HCMOS/TTL Clock Oscillator

MECHANICAL SPECIFICATIONS

PACKAGE DRAWING

MARKING INFORMATION

1

(1.2)

0.047

PIN 1 IDENTIFIER

4

3

2

Inch

(mm)

Key:

(3.7)

0.146

(1.4)

0.197 ±0.008

(5.0 ±0.2)

0.071

0.276 ±0.008

0.055

0.200

(5.08)

(7.0 ±0.2)

MAX

(1.8)

SUGGESTED SOLDER PAD GEOMETRY

SUGGESTED REFLOW PROFILE

.200 [5.08]

.165 [4.20]

.071 [1.80]

Key:

[mm]

Inch

.079 [2.00]

12

3

4

CMOS/TTL OUTPUT WAVEFORM

TEST CIRCUIT, CMOS LOAD

PERIOD (T)

90%, 80%, 2.4V

50%, 1.5V

10%, 20%, 0.5V

DUTY CYCLE = t/T x 100 (%)

V

V

OH

OL

Tr

Tf

UPTIME (t)

POWER

SUPPLY

+

-

+-

-

+

VM

mA

.01uF

D.U.T.

43

12

Including probe

capacitance.

Enable Input

ENABLE TRUTH TABLE

PIN 1

PIN 3

Logic ‘1’

Output

Open

Output

Logic ‘0’

High Imp.

D.U.T. PIN ASSIGNMENTS

PIN

SYMBOL

DESCRIPTION

1

EOH

Enable Input

2

GND

Circuit & Package Ground

3

Output

RF Output

4

Supply Voltage

1. ** - Manufacturing Site Code.

2. XXMXXXX - Frequency marked with 4 significant

digits after the ‘M’.

3. YYWW – Date code, YY – year, WW – week.

NOTES

1. Termination pads (e4), barrier-plating is nickel

(Ni) with gold (Au) flash plate.

2. Reflow conditions per JEDEC J-STD-020.

0

100

200

300

0

30

60

90

120

150

180

210

240

270

300

Time (Seconds)

Temp.

(°C)

Maximum 260°C, 10 seconds

Typical 245°C

130°C

CTS ** - 1V8

XXMXXXX

●

YYWW