CD74HCT670M96 datasheet(2/17 Pages) TAOS

部品番号	CD74HCT670M96

部品情報	High-Speed CMOS Logic 4x4 Register File

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2

Functional Diagram

9

6

7

10

Q0

Q1

Q2

Q3

4

11

15

1

3

D0

D2

WE

RE

514

13

RA1

RA0

WA0

WA1

12

2

D1

D3

WRITE MODE SELECT TABLE

OPERATING

MODE

INPUTS

INTERNAL

LATCHES

(NOTE 1)

WE

DN

Write Data

L

LH

H

Data Latched

H

X

No Change

NOTE:

1. The Write Address (WA0 and WA1) to the “internal latches” must

be stable while WE is LOW for conventional operation.

READ MODE SELECT TABLE

OPERATING

MODE

INPUTS

OUTPUT

QN

RE

INTERNAL

LATCHES

(NOTE 2)

Read

L

LH

H

Disabled

H

X

(Z)

NOTE:

2. The selection of the “internal latches” by Read Address (RA0 and

RA1) are not constrained by WE or RE operation.

H = High Voltage Level

L = Low Voltage Level

X= Don’t Care

Z = High Impedance “Off” State

CD54HC670, CD74HC670, CD74HCT670

同様の部品番号 - CD74HCT670M96

メーカー	部品番号	データシート	部品情報
Texas Instruments	CD74HCT670M96	284Kb / 14P	[Old version datasheet] High-Speed CMOS Logic 4x4 Register File
	CD74HCT670M96	351Kb / 17P	[Old version datasheet] High-Speed CMOS Logic 4x4 Register File
	CD74HCT670M96E4	284Kb / 14P	[Old version datasheet] High-Speed CMOS Logic 4x4 Register File
	CD74HCT670M96E4	351Kb / 17P	[Old version datasheet] High-Speed CMOS Logic 4x4 Register File
	CD74HCT670M96G4	351Kb / 17P	[Old version datasheet] High-Speed CMOS Logic 4x4 Register File

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同様の説明 - CD74HCT670M96

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