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STK16C88-WF25 データシート(PDF) 2 Page - Simtek Corporation |
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STK16C88-WF25 データシート(HTML) 2 Page - Simtek Corporation |
2 / 13 page 2 Jan, 2008 Document Control #ML0018 Rev 2.0 STK16C88 PIN CONFIGURATIONS PIN CONFIGURATIONS Pin Name I/O Description A14-A0 Input Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array DQ7-DQ0 I/O Data: Bi-directional 8-bit data bus for accessing the nvSRAM E Input Chip Enable: The active low E input selects the device W Input Write Enable: The active low W enables data on the DQ pins to be written to the address location latched by the falling edge of E G Input Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G high caused the DQ pins to tri-state. VCC Power Supply Power: 5.0V, ±10% VSS Power Supply Ground A14 A12 A7 A6 DQ0 DQ1 DQ2 A3 A2 A1 A13 A8 A9 A11 A10 DQ7 DQ6 VSS A0 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 E A5 A4 28 27 26 25 VCC W DQ5 DQ3 DQ4 G (TOP) 28 Pin 600 mil PDIP |
同様の部品番号 - STK16C88-WF25 |
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同様の説明 - STK16C88-WF25 |
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