 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
ST20-C1 データシート(PDF) 7 Page - STMicroelectronics |
|
||||||||||||||||||||||||||||||
ST20-C1 データシート(HTML) 7 Page - STMicroelectronics |
|
|
7 / 205 page  7/205 2 Notation ® For primary instructions the code stored in memory is determined partly by the value of the operand to the instruction. In this case the op-code is shown as ‘Function x’ where x is the function code in the last byte of the instruction. For example, adc (add constant) is shown as Code: Function 8 This means that adc 1 would appear in memory as the hexadecimal byte value 81. For an operand n in the range 0 to 15, adc n would appear in memory as 8n. 2.1.3 Description The description section provides an indication of the purpose of the instruction as well as a summary of the behavior. This may include details of the use of registers, whose initial values may be used as parameters and into which results may be stored. For example, the and instruction contains the following description: Description: Bitwise AND of Areg and Breg. 2.1.4 Definition The definition section provides a formal description of the behavior of the instruction. The behavior is defined in ter ms of its effect on the state of the processor, i.e. the changes in the values in registers and memory before and after the instruction has executed. The effects of the instruction on registers, etc. are given as statements of the following form: register ′← expression involving registers, etc. memory_location ′← expression involving registers, etc. Primed names (e.g. Areg ′) represent values after instruction execution, while names without primes represent values when the instruction execution starts. For example, Areg represents the value in Areg before the execution of the instruction while Areg ′ represents the value in Areg afterwards. So the example above states that after the instruction has been executed the register or memory location on the left hand side holds the value of the expression on the right hand side. Only the changed registers and memory locations are given on the left hand side of the statements. If the new value of a register or memory location is not given then the value is unchanged by the instruction. The description is written with the main function of the instruction stated first. For example the main function of the add instruction is to put the sum of Areg and Breg into Areg). This is followed by the other effects of the instruction, such as rotating the stack. There is no temporal ordering implied by the order in which the statements are written. |
同様の部品番号 - ST20-C1 |
|
同様の説明 - ST20-C1 |
|
|
リンク URL |
| プライバシーポリシー |
| ALLDATASHEET.JP |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
