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LM3S316-IRN20-A1T データシート(PDF) 5 Page - List of Unclassifed Manufacturers

部品番号 LM3S316-IRN20-A1T
部品情報  Microcontroller
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LM3S316-IRN20-A1T データシート(HTML) 5 Page - List of Unclassifed Manufacturers

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LM3S316 Data Sheet
April 27, 2007
5
Preliminary
10.4
Register Map ..................................................................................................................................... 188
10.5
Register Descriptions......................................................................................................................... 189
11.
Analog-to-Digital Converter (ADC) .................................................................................. 210
11.1
Block Diagram ................................................................................................................................... 211
11.2
Functional Description ....................................................................................................................... 211
11.2.1 Sample Sequencers .......................................................................................................................... 211
11.2.2 Module Control .................................................................................................................................. 212
11.2.3 Hardware Sample Averaging Circuit.................................................................................................. 213
11.2.4 Analog-to-Digital Converter ............................................................................................................... 213
11.2.5 Test Modes ........................................................................................................................................ 213
11.2.6 Internal Temperature Sensor............................................................................................................. 213
11.3
Initialization and Configuration........................................................................................................... 213
11.3.1 Module Initialization ........................................................................................................................... 214
11.3.2 Sample Sequencer Configuration...................................................................................................... 214
11.4
Register Map ..................................................................................................................................... 214
11.5
Register Descriptions......................................................................................................................... 215
12.
Universal Asynchronous Receivers/Transmitters (UARTs).......................................... 240
12.1
Block Diagram ................................................................................................................................... 241
12.2
Functional Description ....................................................................................................................... 241
12.2.1 Transmit/Receive Logic ..................................................................................................................... 241
12.2.2 Baud-Rate Generation....................................................................................................................... 242
12.2.3 Data Transmission............................................................................................................................. 243
12.2.4 FIFO Operation .................................................................................................................................. 243
12.2.5 Interrupts............................................................................................................................................ 243
12.2.6 Loopback Operation .......................................................................................................................... 244
12.3
Initialization and Configuration........................................................................................................... 244
12.4
Register Map ..................................................................................................................................... 245
12.5
Register Descriptions......................................................................................................................... 246
13.
Synchronous Serial Interface (SSI) ................................................................................. 276
13.1
Block Diagram ................................................................................................................................... 276
13.2
Functional Description ....................................................................................................................... 277
13.2.1 Bit Rate Generation ........................................................................................................................... 277
13.2.2 FIFO Operation .................................................................................................................................. 277
13.2.3 Interrupts............................................................................................................................................ 277
13.2.4 Frame Formats .................................................................................................................................. 278
13.3
Initialization and Configuration........................................................................................................... 285
13.4
Register Map ..................................................................................................................................... 286
13.5
Register Descriptions......................................................................................................................... 287
14.
Inter-Integrated Circuit (I2C) Interface ............................................................................ 311
14.1
Block Diagram ................................................................................................................................... 311
14.2
Functional Description ....................................................................................................................... 311
14.2.1 I2C Bus Functional Overview............................................................................................................. 312
14.2.2 Available Speed Modes ..................................................................................................................... 321
14.3
Initialization and Configuration........................................................................................................... 322
14.4
Register Map ..................................................................................................................................... 323
14.5
Register Descriptions (I2C Master).................................................................................................... 323
14.6
Register Descriptions (I2C Slave)...................................................................................................... 337


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