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LM3S601-IRN50-A1T データシート(PDF) 5 Page - List of Unclassifed Manufacturers

部品番号 LM3S601-IRN50-A1T
部品情報  Microcontroller
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メーカー  ETC2 [List of Unclassifed Manufacturers]
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LM3S601-IRN50-A1T データシート(HTML) 5 Page - List of Unclassifed Manufacturers

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10.3
Initialization and Configuration ................................................................................................. 205
10.4
Register Map .......................................................................................................................... 205
10.5
Register Descriptions .............................................................................................................. 206
11
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 227
11.1
Block Diagram ........................................................................................................................ 228
11.2
Functional Description ............................................................................................................. 228
11.2.1 Transmit/Receive Logic ........................................................................................................... 228
11.2.2 Baud-Rate Generation ............................................................................................................. 229
11.2.3 Data Transmission .................................................................................................................. 230
11.2.4 FIFO Operation ....................................................................................................................... 230
11.2.5 Interrupts ................................................................................................................................ 230
11.2.6 Loopback Operation ................................................................................................................ 231
11.3
Initialization and Configuration ................................................................................................. 231
11.4
Register Map .......................................................................................................................... 232
11.5
Register Descriptions .............................................................................................................. 233
12
Synchronous Serial Interface (SSI) ................................................................................ 265
12.1
Block Diagram ........................................................................................................................ 265
12.2
Functional Description ............................................................................................................. 265
12.2.1 Bit Rate Generation ................................................................................................................. 266
12.2.2 FIFO Operation ....................................................................................................................... 266
12.2.3 Interrupts ................................................................................................................................ 266
12.2.4 Frame Formats ....................................................................................................................... 267
12.3
Initialization and Configuration ................................................................................................. 274
12.4
Register Map .......................................................................................................................... 275
12.5
Register Descriptions .............................................................................................................. 276
13
Inter-Integrated Circuit (I2C) Interface ............................................................................ 302
13.1
Block Diagram ........................................................................................................................ 302
13.2
Functional Description ............................................................................................................. 302
13.2.1 I2C Bus Functional Overview .................................................................................................... 303
13.2.2 Available Speed Modes ........................................................................................................... 305
13.2.3 Interrupts ................................................................................................................................ 306
13.2.4 Loopback Operation ................................................................................................................ 306
13.2.5 Command Sequence Flow Charts ............................................................................................ 307
13.3
Initialization and Configuration ................................................................................................. 313
13.4
I2C Register Map ..................................................................................................................... 314
13.5
Register Descriptions (I2C Master) ........................................................................................... 315
13.6
Register Descriptions (I2C Slave) ............................................................................................. 328
14
Analog Comparators ....................................................................................................... 337
14.1
Block Diagram ........................................................................................................................ 338
14.2
Functional Description ............................................................................................................. 338
14.2.1 Internal Reference Programming .............................................................................................. 340
14.3
Initialization and Configuration ................................................................................................. 341
14.4
Register Map .......................................................................................................................... 341
14.5
Register Descriptions .............................................................................................................. 342
15
Pulse Width Modulator (PWM) ........................................................................................ 350
15.1
Block Diagram ........................................................................................................................ 350
15.2
Functional Description ............................................................................................................. 350
5
October 01, 2007
Preliminary
LM3S601 Microcontroller


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