10
General-Purpose Timers ................................................................................................. 200
10.1
Block Diagram ........................................................................................................................ 201
10.2
Functional Description ............................................................................................................. 201
10.2.1 GPTM Reset Conditions .......................................................................................................... 201
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 201
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 203
10.3
Initialization and Configuration ................................................................................................. 207
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 207
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 208
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 208
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 209
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 209
10.3.6 16-Bit PWM Mode ................................................................................................................... 210
10.4
Register Map .......................................................................................................................... 210
10.5
Register Descriptions .............................................................................................................. 211
11
Watchdog Timer ............................................................................................................... 236
11.1
Block Diagram ........................................................................................................................ 236
11.2
Functional Description ............................................................................................................. 236
11.3
Initialization and Configuration ................................................................................................. 237
11.4
Register Map .......................................................................................................................... 237
11.5
Register Descriptions .............................................................................................................. 238
12
Analog-to-Digital Converter (ADC) ................................................................................. 259
12.1
Block Diagram ........................................................................................................................ 260
12.2
Functional Description ............................................................................................................. 260
12.2.1 Sample Sequencers ................................................................................................................ 260
12.2.2 Module Control ........................................................................................................................ 261
12.2.3 Hardware Sample Averaging Circuit ......................................................................................... 262
12.2.4 Analog-to-Digital Converter ...................................................................................................... 262
12.2.5 Test Modes ............................................................................................................................. 262
12.2.6 Internal Temperature Sensor .................................................................................................... 262
12.3
Initialization and Configuration ................................................................................................. 263
12.3.1 Module Initialization ................................................................................................................. 263
12.3.2 Sample Sequencer Configuration ............................................................................................. 263
12.4
Register Map .......................................................................................................................... 264
12.5
Register Descriptions .............................................................................................................. 265
13
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 292
13.1
Block Diagram ........................................................................................................................ 293
13.2
Functional Description ............................................................................................................. 293
13.2.1 Transmit/Receive Logic ........................................................................................................... 293
13.2.2 Baud-Rate Generation ............................................................................................................. 294
13.2.3 Data Transmission .................................................................................................................. 295
13.2.4 Serial IR (SIR) ......................................................................................................................... 295
13.2.5 FIFO Operation ....................................................................................................................... 296
13.2.6 Interrupts ................................................................................................................................ 296
13.2.7 Loopback Operation ................................................................................................................ 297
13.2.8 IrDA SIR block ........................................................................................................................ 297
13.3
Initialization and Configuration ................................................................................................. 297
13.4
Register Map .......................................................................................................................... 298
5
October 08, 2007
Preliminary
LM3S6938 Microcontroller