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LM3S601-IQC50-A0 データシート(PDF) 3 Page - List of Unclassifed Manufacturers

部品番号 LM3S601-IQC50-A0
部品情報  Microcontroller
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LM3S601-IQC50-A0 データシート(HTML) 3 Page - List of Unclassifed Manufacturers

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Table of Contents
About This Document .................................................................................................................... 18
Audience .............................................................................................................................................. 18
About This Manual ................................................................................................................................ 18
Related Documents ............................................................................................................................... 18
Documentation Conventions .................................................................................................................. 18
1
Architectural Overview ...................................................................................................... 20
1.1
Product Features ...................................................................................................................... 20
1.2
Target Applications .................................................................................................................... 25
1.3
High-Level Block Diagram ......................................................................................................... 25
1.4
Functional Overview .................................................................................................................. 26
1.4.1
ARM Cortex™-M3 ..................................................................................................................... 27
1.4.2
Motor Control Peripherals .......................................................................................................... 27
1.4.3
Analog Peripherals .................................................................................................................... 28
1.4.4
Serial Communications Peripherals ............................................................................................ 29
1.4.5
System Peripherals ................................................................................................................... 30
1.4.6
Memory Peripherals .................................................................................................................. 30
1.4.7
Additional Features ................................................................................................................... 31
1.4.8
Hardware Details ...................................................................................................................... 32
1.4.9
System Block Diagram .............................................................................................................. 33
2
ARM Cortex-M3 Processor Core ...................................................................................... 34
2.1
Block Diagram .......................................................................................................................... 35
2.2
Functional Description ............................................................................................................... 35
2.2.1
Serial Wire and JTAG Debug ..................................................................................................... 35
2.2.2
Embedded Trace Macrocell (ETM) ............................................................................................. 36
2.2.3
Trace Port Interface Unit (TPIU) ................................................................................................. 36
2.2.4
ROM Table ............................................................................................................................... 36
2.2.5
Memory Protection Unit (MPU) ................................................................................................... 36
2.2.6
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 36
3
Memory Map ....................................................................................................................... 40
4
Interrupts ............................................................................................................................ 42
5
JTAG Interface .................................................................................................................... 44
5.1
Block Diagram .......................................................................................................................... 45
5.2
Functional Description ............................................................................................................... 45
5.2.1
JTAG Interface Pins .................................................................................................................. 46
5.2.2
JTAG TAP Controller ................................................................................................................. 47
5.2.3
Shift Registers .......................................................................................................................... 48
5.2.4
Operational Considerations ........................................................................................................ 48
5.3
Initialization and Configuration ................................................................................................... 49
5.4
Register Descriptions ................................................................................................................ 50
5.4.1
Instruction Register (IR) ............................................................................................................. 50
5.4.2
Data Registers .......................................................................................................................... 52
6
System Control ................................................................................................................... 54
6.1
Functional Description ............................................................................................................... 54
6.1.1
Device Identification .................................................................................................................. 54
3
October 01, 2007
Preliminary
LM3S601 Microcontroller


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