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SN74AUP2G08 データシート(PDF) 1 Page - Texas Instruments |
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SN74AUP2G08 データシート(HTML) 1 Page - Texas Instruments |
1 / 13 page 1 FEATURES DCUPACKAGE (TOP VIEW) 3 6 2B 2Y 8 1 V CC 1A 5 GND 4 2A 2 7 1Y 1B YZP PACKAGE (BOTTOMVIEW) GND 5 4 2A 3 6 2B 2Y 2 7 1Y 1B 8 V CC 1 1A Seemechanicaldrawingsfordimensions. 1 2 3 4 5 6 7 8 1Y 2B 2A 2Y 1B 1A RSEPACKAGE (TOP VIEW) YFP PACKAGE (BOTTOMVIEW) GND 5 4 2A 3 6 2B 2Y 2 7 1Y 1B 8 V CC 1 1A PR EVIE W PR EVIE W DESCRIPTION/ORDERING INFORMATION AUP LVC AUP AUP LVC Static-Power Consumption ( µA) Dynamic-Power Consumption (pF) † Single, dual, and triple gates 3.3-V Logic† 3.3-V Logic† 0% 20% 40% 60% 80% 100% 0% 20% 40% 60% 80% 100% −0.5 0 0.5 1 1.5 2 2.5 3 3.5 0 5 10 15 20 25 30 35 40 45 Time − ns † AUP1G08 data at CL = 15 pF Output Input Switching Characteristics at 25 MHz† SN74AUP2G08 LOW-POWER DUAL 2-INPUT POSITIVE-AND GATE SCES681A – JANUARY 2008 – REVISED JANUARY 2008 www.ti.com 2 • Available in the Texas Instruments NanoFree™ • Wide Operating V CC Range of 0.8 V to 3.6 V Package • Optimized for 3.3-V Operation • Low Static-Power Consumption • 3.6-V I/O Tolerant to Support Mixed-Mode (ICC = 0.9 µA Max) Signal Operation • Low Dynamic-Power Consumption • t pd = 4.3 ns Max at 3.3 V (Cpd = 4.3 pF Typ at 3.3 V) • Suitable for Point-to-Point Applications • Low Input Capacitance (C i = 1.5 pF Typ) • Latch-Up Performance Exceeds 100 mA Per • Low Noise – Overshoot and Undershoot JESD 78, Class II <10% of VCC • ESD Performance Tested Per JESD 22 • I off Supports Partial-Power-Down Mode – 2000-V Human-Body Model Operation (A114-B, Class II) • Schmitt-Trigger Action Allows Slow Input – 200-V Machine Model (A115-A) Transition and Better Switching Noise – 1000-V Charged-Device Model (C101) Immunity at the Input (Vhys = 250 mV Typ at 3.3 V) The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2). Figure 1. AUP – The Lowest-Power Family Figure 2. Excellent Signal Integrity 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 NanoFree is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains Copyright © 2008, Texas Instruments Incorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
同様の部品番号 - SN74AUP2G08 |
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同様の説明 - SN74AUP2G08 |
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