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ST72101G2M6 データシート(PDF) 8 Page - STMicroelectronics |
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ST72101G2M6 データシート(HTML) 8 Page - STMicroelectronics |
8 / 84 page 8/84 ST72101/ST72212/ST72213 Table 3. ST72101 Pin Configuration Pin n ° SDIP32 Pin n ° SO28 Pin Name Type Description Remarks 1 1 RESET I/O Bidirectional. Active low. Top priority non maskable interrupt. 2 2 OSCIN I Input/Output Oscillator pin. These pins connect a parallel-resonant crystal, or an external source to the on-chip oscillator. 3 3 OSCOUT O 4 4 PB7/SS I/O Port B7 or SPI Slave Select (active low) External Interrupt: EI1 5 5 PB6/SCK I/O Port B6 or SPI Serial Clock External Interrupt: EI1 6 6 PB5/MISO I/O Port B5 or SPI Master In/ Slave Out Data External Interrupt: EI1 7 7 PB4/MOSI I/O Port B4 or SPI Master Out / Slave In Data External Interrupt: EI1 8 NC Not Connected 9 NC Not Connected 10 8 PB3/OCMP2_A I/O Port B3 or TimerA Output Compare 2 External Interrupt: EI1 11 9 PB2/ICAP2_A I/O Port B2 or TimerA Input Capture 2 External Interrupt: EI1 12 10 PB1/OCMP1_A I/O Port B1 or TimerA Output Compare 1 External Interrupt: EI1 13 11 PB0/ICAP1_A I/O Port B0 or TimerA Input Capture 1 External Interrupt: EI1 14 12 PC5/EXTCLK_A I/O Port C5 or TimerA Input Clock External Interrupt: EI1 15 13 PC4 I/O Port C4 External Interrupt: EI1 16 14 PC3 I/O Port C3 External Interrupt: EI1 17 15 PC2/CLKOUT I/O Port C2 or Internal Clock Frequency Output. Clockout is driven by MCO bit of the miscellaneous register. External Interrupt: EI1 18 16 PC1 I/O Port C1 External Interrupt: EI1 19 17 PC0 I/O Port C0 External Interrupt: EI1 20 18 PA7 I/O Port A7, High Sink External Interrupt: EI0 21 19 PA6 I/O Port A6, High Sink External Interrupt: EI0 22 20 PA5 I/O Port A5, High Sink External Interrupt: EI0 23 21 PA4 I/O Port A4, High Sink External Interrupt: EI0 24 NC Not Connected 25 NC Not Connected 26 22 PA3 I/O Port A3, High Sink External Interrupt: EI0 27 23 PA2 I/O Port A2, High Sink External Interrupt: EI0 28 24 PA1 I/O Port A1, High Sink External Interrupt: EI0 29 25 PA0 I/O Port A0, High Sink External Interrupt: EI0 30 26 TEST/VPP (1) I/S Test mode pin (should be tied low in user mode). In the EPROM programming mode, this pin acts as the programming voltage input VPP. 31 27 VSS S Ground 32 28 VDD S Main power supply Note 1:VPP on EPROM/OTP only. 8 |
同様の部品番号 - ST72101G2M6 |
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同様の説明 - ST72101G2M6 |
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