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ST7LITE0 データシート(PDF) 16 Page - STMicroelectronics |
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ST7LITE0 データシート(HTML) 16 Page - STMicroelectronics |
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16 / 122 page  ST7LITE0, ST7SUPERLITE 16/122 DATA EEPROM (Cont’d) 5.3 MEMORY ACCESS The Data EEPROM memory read/write access modes are controlled by the E2LAT bit of the EEP- ROM Control/Status register (EECSR). The flow- chart in Figure 7 describes these different memory access modes. Read Operation (E2LAT=0) The EEPROM can be read as a normal ROM loca- tion when the E2LAT bit of the EECSR register is cleared. In a read cycle, the byte to be accessed is put on the data bus in less than 1 CPU clock cycle. This means that reading data from EEPROM takes the same time as reading data from EPROM, but this memory cannot be used to exe- cute machine code. Write Operation (E2LAT=1) To access the write mode, the E2LAT bit has to be set by software (the E2PGM bit remains cleared). When a write access to the EEPROM area occurs, the value is latched inside the 32 data latches ac- cording to its address. When PGM bit is set by the software, all the previ- ous bytes written in the data latches (up to 32) are programmed in the EEPROM cells. The effective high address (row) is determined by the last EEP- ROM write sequence. To avoid wrong program- ming, the user must take care that all the bytes written between two programming sequences have the same high address: only the five Least Significant Bits of the address can change. At the end of the programming cycle, the PGM and LAT bits are cleared simultaneously. Note: Care should be taken during the program- ming cycle. Writing to the same memory location will over-program the memory (logical AND be- tween the two write access data result) because the data latches are only cleared at the end of the programming cycle and by the falling edge of the E2LAT bit. It is not possible to read the latched data. This note is ilustrated by the Figure 9. Figure 7. Data EEPROM Programming Flowchart READ MODE E2LAT=0 E2PGM=0 WRITE MODE E2LAT=1 E2PGM=0 READ BYTES IN EEPROM AREA WRITEUPTO 32 BYTES IN EEPROM AREA (with the same 11 MSB of the address) START PROGRAMMING CYCLE E2LAT=1 E2PGM=1 (set by software) E2LAT 01 CLEARED BY HARDWARE 1 |
同様の部品番号 - ST7LITE0 |
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