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ADUM5202ARWZ2 データシート(PDF) 7 Page - Analog Devices |
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ADUM5202ARWZ2 データシート(HTML) 7 Page - Analog Devices |
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7 / 23 page  Preliminary Technical Data ADuM5200/5201/5202 Rev. PrA | Page 7 of 23 ELECTRICAL CHARACTERISTICS – 5V PRIMARY INPUT SUPPLY / 3.3V SECONDARY ISOLATED SUPPLY1 4.5 V ≤ VDD1 ≤ 5.5 V, VSEL= GNDISO, all voltages are relative to their respective ground. All min/max specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C, VDD = 5.0 V, VISO = 3.3 V, VSEL= GNDISO. Table 3. Parameter Symbol Min Typ Max Unit Test Conditions Setpoint VISO 3.0 3.3 3.6 V IISO=0mA Line Regulation VISO(LINE) 1 mV/V IISO=50mA, VDD1=4.5V to 5.5V Load Regulation VISO(LOAD) 1 5 % IISO = 10mA to 100mA Output Ripple VISO(RIP) 50 mVP-P 20MHz Bandwidth, CBO=0.1 μF ║ 10μF, IISO = 90mA Output Noise VISO(N) 130 mVP-P 20MHz Bandwidth, CBO=0.1 μF ║ 10μF, IISO = 90mA Switching Frequency fOSC 180 MHz PWM Frequency fPWM 625 kHz DC to 2 Mbps Data Rate2 Maximum Output Supply Current3 IISO(max) 100 mA f ≤ 1 MHz, VISO=3.0V Efficiency At Max. Output Supply Current4 30 % IISO = IISO(2,max), f ≤ 1 MHz IDD1 Supply Current, No VISO load5 IDD1(Q) 9 13 mA IISO = 0mA, f ≤ 1 MHz 25 Mbps Data Rate (CRWZ Grade Only) IDD1 Supply Current, No VISO Load6 ADuM5200 IDD1(D) 22 mA IISO = 0mA, CL=15pF, f = 12.5 MHz ADuM5201 IDD1(D) 25 mA IISO = 0mA, CL=15pF, f = 12.5 MHz ADuM5202 IDD1(D) 27 mA IISO = 0mA, CL=15pF, f = 12.5 MHz Available VISO Supply Current7 ADuM5200 IISO(LOAD) 96 mA CL=15pF, f = 12.5 MHz ADuM5201 IISO(LOAD) 95 mA CL=15pF, f = 12.5 MHz ADuM5202 IISO(LOAD) 93 mA CL=15pF, f = 12.5 MHz IDD1 Supply Current, Full VISO load8 IDD1(Max) 230 mA CL=0pF, f = 0 MHz, VDD = 5V, IISO=100mA Input Currents IIA, IIB −10 +0.01 +10 μA Logic High Input Threshold VIH 0.7 VISO V Logic Low Input Threshold VIL 0.3 VISO V Logic High Output Voltages VOAH, VOBH VDD1 − 0.2, VISO − 0.2 5.0 V IOx = −20 μA, VIx = VIxH VOAH, VOBH VDD1 − 0.5, V1SO − 0.5 4.8 V IOx = −4 mA, VIx = VIxH Logic Low Output Voltages VOAL, VOBL 0.0 0.1 V IOx = 20 μA, VIx = VIxL VOAL, VOBL 0.0 0.4 V IOx = 4 mA, VIx = VIxL AC SPECIFICATIONS ADuM520xARWZ Minimum Pulse Width9 PW 1000 ns CL = 15 pF, CMOS signal levels Maximum Data Rate10 1 Mbps CL = 15 pF, CMOS signal levels Propagation Delay11 tPHL, tPLH 60 100 ns CL = 15 pF, CMOS signal levels Pulse-Width Distortion, |tPLH − tPHL|11 PWD 40 ns CL = 15 pF, CMOS signal levels Propagation Delay Skew12 tPSK 50 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching13 tPSKCD/OD 50 ns CL = 15 pF, CMOS signal levels ADuM520xCRWZ Minimum Pulse Width13 PW 40 ns CL = 15 pF, CMOS signal levels Maximum Data Rate14 25 Mbps CL = 15 pF, CMOS signal levels Propagation Delay15 tPHL, tPLH 45 60 ns CL = 15 pF, CMOS signal levels |
同様の部品番号 - ADUM5202ARWZ2 |
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同様の説明 - ADUM5202ARWZ2 |
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