LM3S613 Data Sheet
October 8, 2006
5
Preliminary
10.5
Register Descriptions......................................................................................................................... 180
11.
Analog-to-Digital Converter (ADC) .................................................................................. 201
11.1
Block Diagram ................................................................................................................................... 202
11.2
Functional Description ....................................................................................................................... 202
11.2.1 Sample Sequencers .......................................................................................................................... 202
11.2.2 Module Control .................................................................................................................................. 203
11.2.3 Hardware Sample Averaging Circuit.................................................................................................. 204
11.2.4 Analog-to-Digital Converter ............................................................................................................... 204
11.2.5 Test Modes ........................................................................................................................................ 204
11.2.6 Internal Temperature Sensor ............................................................................................................. 204
11.3
Initialization and Configuration........................................................................................................... 204
11.3.1 Module Initialization ........................................................................................................................... 205
11.3.2 Sample Sequencer Configuration ...................................................................................................... 205
11.4
Register Map ..................................................................................................................................... 205
11.5
Register Descriptions......................................................................................................................... 206
12.
Universal Asynchronous Receivers/Transmitters (UARTs).......................................... 231
12.1
Block Diagram ................................................................................................................................... 232
12.2
Functional Description ....................................................................................................................... 232
12.2.1 Transmit/Receive Logic ..................................................................................................................... 232
12.2.2 Baud-Rate Generation ....................................................................................................................... 233
12.2.3 Data Transmission ............................................................................................................................. 234
12.2.4 FIFO Operation .................................................................................................................................. 234
12.2.5 Interrupts............................................................................................................................................ 234
12.2.6 Loopback Operation .......................................................................................................................... 235
12.3
Initialization and Configuration........................................................................................................... 235
12.4
Register Map ..................................................................................................................................... 236
12.5
Register Descriptions......................................................................................................................... 237
13.
Synchronous Serial Interface (SSI) ................................................................................. 267
13.1
Block Diagram ................................................................................................................................... 267
13.2
Functional Description ....................................................................................................................... 268
13.2.1 Bit Rate Generation ........................................................................................................................... 268
13.2.2 FIFO Operation .................................................................................................................................. 268
13.2.3 Interrupts............................................................................................................................................ 268
13.2.4 Frame Formats .................................................................................................................................. 269
13.3
Initialization and Configuration........................................................................................................... 276
13.4
Register Map ..................................................................................................................................... 277
13.5
Register Descriptions......................................................................................................................... 278
14.
Inter-Integrated Circuit (I2C) Interface ............................................................................ 302
14.1
Block Diagram ................................................................................................................................... 302
14.2
Functional Description ....................................................................................................................... 302
14.2.1 I2C Bus Functional Overview ............................................................................................................. 303
14.2.2 Available Speed Modes ..................................................................................................................... 310
14.3
Initialization and Configuration........................................................................................................... 311
14.4
Register Map ..................................................................................................................................... 312
14.5
Register Descriptions (I2C Master).................................................................................................... 312
14.6
Register Descriptions (I2C Slave)...................................................................................................... 326
15.
Analog Comparator........................................................................................................... 334
15.1
Block Diagram ................................................................................................................................... 334
15.2
Functional Description ....................................................................................................................... 334
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