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LM3S6611-IRN25-A0T データシート(PDF) 6 Page - List of Unclassifed Manufacturers

部品番号 LM3S6611-IRN25-A0T
部品情報  Microcontroller
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メーカー  ETC2 [List of Unclassifed Manufacturers]
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14.2
Functional Description ............................................................................................................. 332
14.2.1 I2C Bus Functional Overview .................................................................................................... 333
14.2.2 Available Speed Modes ........................................................................................................... 335
14.2.3 Interrupts ................................................................................................................................ 336
14.2.4 Loopback Operation ................................................................................................................ 336
14.2.5 Command Sequence Flow Charts ............................................................................................ 337
14.3
Initialization and Configuration ................................................................................................. 343
14.4
I2C Register Map ..................................................................................................................... 344
14.5
Register Descriptions (I2C Master) ........................................................................................... 345
14.6
Register Descriptions (I2C Slave) ............................................................................................. 358
15
Ethernet Controller .......................................................................................................... 367
15.1
Block Diagram ........................................................................................................................ 368
15.2
Functional Description ............................................................................................................. 368
15.2.1 Internal MII Operation .............................................................................................................. 368
15.2.2 PHY Configuration/Operation ................................................................................................... 369
15.2.3 MAC Configuration/Operation .................................................................................................. 370
15.2.4 Interrupts ................................................................................................................................ 372
15.3
Initialization and Configuration ................................................................................................. 373
15.4
Ethernet Register Map ............................................................................................................. 373
15.5
Ethernet MAC Register Descriptions ......................................................................................... 375
15.6
MII Management Register Descriptions ..................................................................................... 392
16
Analog Comparators ....................................................................................................... 411
16.1
Block Diagram ........................................................................................................................ 411
16.2
Functional Description ............................................................................................................. 411
16.2.1 Internal Reference Programming .............................................................................................. 413
16.3
Initialization and Configuration ................................................................................................. 414
16.4
Register Map .......................................................................................................................... 414
16.5
Register Descriptions .............................................................................................................. 415
17
Pin Diagram ...................................................................................................................... 423
18
Signal Tables .................................................................................................................... 424
19
Operating Characteristics ............................................................................................... 438
20
Electrical Characteristics ................................................................................................ 439
20.1
DC Characteristics .................................................................................................................. 439
20.1.1 Maximum Ratings ................................................................................................................... 439
20.1.2 Recommended DC Operating Conditions .................................................................................. 439
20.1.3 On-Chip Low Drop-Out (LDO) Regulator Characteristics ............................................................ 440
20.1.4 Power Specifications ............................................................................................................... 440
20.1.5 Flash Memory Characteristics .................................................................................................. 442
20.2
AC Characteristics ................................................................................................................... 442
20.2.1 Load Conditions ...................................................................................................................... 442
20.2.2 Clocks .................................................................................................................................... 442
20.2.3 Analog Comparator ................................................................................................................. 443
20.2.4 I2C ......................................................................................................................................... 443
20.2.5 Ethernet Controller .................................................................................................................. 444
20.2.6 Hibernation Module ................................................................................................................. 447
20.2.7 Synchronous Serial Interface (SSI) ........................................................................................... 448
20.2.8 JTAG and Boundary Scan ........................................................................................................ 449
October 09, 2007
6
Preliminary
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