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L6911ETR データシート(PDF) 5 Page - STMicroelectronics |
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L6911ETR データシート(HTML) 5 Page - STMicroelectronics |
5 / 34 page L6911E Pin settings 5/34 2 Pin settings 2.1 Pin connection Figure 2. Pin connection (top view) 2.2 Pin description VSEN OCSET SS/INH VID0 VID1 VID3 VID2 VID4 COMP PGOOD PHASE UGATE PGND BOOT LGATE VCC OVP RT 1 3 2 4 5 6 7 8 9 18 17 16 15 14 12 13 11 19 10 20 FB GND D98IN958 Table 2. Pin description N° Name Description 1 VSEN Connected to the output voltage is able to manage over-voltage conditions and the PGOOD signal. 2OCSET A resistor connected from this pin and the upper Mos Drain sets the current limit protection. The internal 200 µA current generator sinks a current from the drain through the external resistor. The Over-Current threshold is due to the following equation: 3 SS/INH The soft start time is programmed connecting an external capacitor from this pin and GND. The internal current generator forces through the capacitor 10 µA. This pin can be used to disable the device forcing a voltage lower than 0.4V 4 - 8 VID0 - 4 Voltage Identification Code pins. These input are internally pulled-up and TTL compatible. They are used to program the output voltage as specified in Table 6 on page 9 and to set the overvoltage and power good thresholds. Connect to GND to program a ‘0’ while leave floating to program a ‘1’. 9COMP This pin is connected to the error amplifier output and is used to compensate the voltage control feedback loop. 10 FB This pin is connected to the error amplifier inverting input and is used to compensate the voltage control feedback loop. I P I OCSET R OCSET Þ R DSon ------------------------------------------------ = |
同様の部品番号 - L6911ETR |
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同様の説明 - L6911ETR |
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