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ST6260B データシート(PDF) 6 Page - STMicroelectronics |
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ST6260B データシート(HTML) 6 Page - STMicroelectronics |
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6 / 84 page  6/84 ST62T53C/T60C/T63C ST62E60C 1.2 PIN DESCRIPTIONS VDD and VSS. Power is supplied to the MCU via these two pins. VDD is the power connection and VSS is the ground connection. OSCin and OSCout. These pins are internally connected to the on-chip oscillator circuit. A quartz crystal, a ceramic resonator or an external clock signal can be connected between these two pins. The OSCin pin is the input pin, the OSCout pin is the output pin. RESET. The active-low RESET pin is used to re- start the microcontroller. TEST/V PP. The TEST must be held at VSS for nor- mal operation. If TEST pin is connected to a +12.5V level during the reset phase, the EPROM/ OTP programming Mode is entered. NMI. The NMI pin provides the capability for asyn- chronous interruption, by applying an external non maskable interrupt to the MCU. It is provided with an on-chip pullup resistor (if option has been ena- bled), and Schmitt trigger characteristics. PA0-PA3. These 4 lines are organized as one I/O port (A). Each line may be configured under soft- ware control as inputs with or without internal pull- up resistors, interrupt generating inputs with pull- up resistors, open-drain or push-pull outputs, ana- log inputs for the A/D converter. PB0-PB3. These 4 lines are organized as one I/O port (B). Each line may be configured under soft- ware control as inputs with or without internal pull- up resistors, interrupt generating inputs with pull- up resistors, open-drain or push-pull outputs. PB0-PB3 can also sink 30mA for direct LED driving. PB6/ARTIMin, PB7/ARTIMout. These pins are ei- ther Port B I/O bits or the Input and Output pins of the AR TIMER. To be used as timer input function PB6 has to be programmed as input with or with- out pull-up. A dedicated bit in the AR TIMER Mode Control Register sets PB7 as timer output function. PB6-PB7 can also sink 30mA for direct LED driv- ing. PC2-PC4. These 3 lines are organized as one I/O port (C). Each line may be configured under soft- ware control as input with or without internal pull- up resistor, interrupt generating input with pull-up resistor, analog input for the A/D converter, open- drain or push-pull output. PC2-PC4 can also be used as respectively Data in, Data out and Clock I/O pins for the on-chip SPI to carry the synchronous serial I/O signals. Figure 2ST62T53C/T60C/T63C/E60C Pin Configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PB0 PB1 VPP/TEST PB2 PB3 Ain/PA0 VSS VDD PC2 / Sin / Ain RESET PA1/Ain ARTIMin/PB6 ARTIMout/PB7 PC3 / Sout / Ain PC4 / Sck / Ain NMI OSCin OSCout PA2/Ain PA3/Ain |
同様の部品番号 - ST6260B |
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同様の説明 - ST6260B |
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