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MC145170DT2 データシート(PDF) 5 Page - Freescale Semiconductor, Inc

部品番号 MC145170DT2
部品情報  PLL Frequency Synthesizer with Serial Interface
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC145170DT2 データシート(HTML) 5 Page - Freescale Semiconductor, Inc

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Electrical Characteristics
MC145170-2 Technical Data, Rev. 5
Freescale Semiconductor
5
Table 4. AC Interface Characteristics
( TA = -40 to 85°C, CL = 50 pF, Input tr = tf = 10 ns, unless otherwise noted.)
Parameter
Symbol
Figure
No.
VDD
V
Guaranteed
Limit
Unit
Serial Data Clock Frequency (Note: Refer to Clock tw Below)
fclk
2
2.7
4.5
5.5
dc to 3.0
dc to 4.0
dc to 4.0
MHz
Maximum Propagation Delay, CLK to Dout
tPLH, tPHL
2, 6
2.7
4.5
5.5
150
85
85
ns
Maximum Disable Time, Dout Active to High Impedance
tPLZ, tPHZ
3, 7
2.7
4.5
5.5
300
200
200
ns
Access Time, Dout High Impedance to Active
tPZL, tPZH
3, 7
2.7
4.5
5.5
0 to 200
0 to 100
0 to 100
ns
Maximum Output Transition Time, Dout
CL = 50 pF
tTLH, tTHL
2, 6
2.7
4.5
5.5
150
50
50
ns
CL = 200 pF
2, 6
2.7
4.5
5.5
900
150
150
ns
Maximum Input Capacitance - Din, ENB, CLK
Cin
-
10
pF
Maximum Output Capacitance - Dout
Cout
-
10
pF
Table 5. Timing Requirements (TA = -40 to 85°C, Input tr = tf = 10 ns, unless otherwise noted.)
Parameter
Symbol
Figure
No.
VDD
V
Guaranteed
Limit
Unit
Minimum Setup and Hold Times, Din vs CLK
tsu, th
4
2.7
4.5
5.5
55
40
40
ns
Minimum Setup, Hold, and Recovery Times, ENB vs CLK
tsu, th, trec
5
2.7
4.5
5.5
135
100
100
ns
Minimum Inactive-High Pulse Width, ENB
tw(H)
5
2.7
4.5
5.5
400
300
300
ns
Minimum Pulse Width, CLK
tw
2
2.7
4.5
5.5
166
125
125
ns
Maximum Input Rise and Fall Times, CLK
tr, tf
2
2.7
4.5
5.5
100
100
100
µs


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