 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
AD7280 データシート(PDF) 11 Page - Analog Devices |
|
||||||||||||||||||||||||||||||
AD7280 データシート(HTML) 11 Page - Analog Devices |
|
|
11 / 33 page  Preliminary Technical Data AD7280 Rev. PrD | Page 11 of 33 Vin0 Vin1 Vin2 Vin3 Vin4 Vin5 Vin6 ADC Vin+ ADC Vin- Figure 5. MUX Configuration During Vin2-Vin1 Sampling The ADC is a 12-bit successive approximation analog-to-digital converter. The converter is composed of a comparator, SAR, some control logic and 2 capacitive DACs. Figure 6 shows a simplified schematic of the converter. During the acquisition phase switches SW1, SW2 and SW3 are closed. The sampling capacitor array acquires the signal on the input during this phase. CAPACITIVE DAC CONTROL LOGIC CAPACITIVE DAC COMPARATOR SW3 SW1 A B CS CS VIN+ SW2 A B VIN– Figure 6. ADC Configuration During Acquisition Phase When the ADC starts a conversion (Figure 7), SW3 opens and SW1 and SW2 move to position B, causing the comparator to become unbalanced. The control logic and capacitive DACs are used to add and subtract fixed amounts of charge to bring the comparator back into a balanced condition. When the comparator is rebalanced, the conversion is complete. The control logic generates the ADC output code. This output code is then stored in the appropriate register for the input that has been converted. CAPACITIVE DAC CONTROL LOGIC CAPACITIVE DAC COMPARATOR SW3 SW1 A B CS CS VIN+ SW2 A B VIN– Figure 7. ADC Configuration During Conversion Phase ANALOG INPUT STRUCTURE Figure 8 shows the equivalent circuit of the analog input structure of the AD7280. The two diodes provide ESD protection. The resistors are lumped components made up of the on-resistance of the input multiplexer and the track-and- hold switch. The value of these resistors is typically about 300Ω. Capacitor C1 can primarily be attributed to pin capacitance while Capacitor C2 is the sampling capacitor of the ADC. The total lumped capacitance of C1 and C2 is approximately 13 pF. D D VDD C2 R1 VIN+ VSS C1 D D VDD C2 R1 VIN– VSS C1 Figure 8. Equivalent Analog Input Circuit TRANSFER FUNCTION The output coding of the AD7280 is straight binary. The designed code transitions occur at successive integer LSB values (that is, 1 LSB, 2 LSB, and so on). The LSB size is dependent on whether the voltage or temperature inputs are being measured. The analog input range of the voltage inputs is 1V to 5V, the analog input range of the temperature inputs is 0V to 5V. The ideal transfer characteristic is shown in Figure 9. Table 5. LSB Sizes for Each Analog Input Range Selected inputs Input Range Full-Scale Range LSB Size Voltage 1 V to 5 V 4 V/4096 976 µV Temperature 0 V to 5 V 5 V/4096 1.22 mV 111...111 111...110 111...000 011...111 1V + 1LSB AGND + 1LSB 5V – 1LSB 4V INPUT RANGE 5V – 1LSB 5V INPUT RANGE ANALOG INPUT 000...010 000...001 000...000 Figure 9. Transfer Characteristic |
同様の部品番号 - AD7280 |
|
同様の説明 - AD7280 |
|
|
リンク URL |
| プライバシーポリシー |
| ALLDATASHEET.JP |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
