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TDA8138 データシート(PDF) 3 Page - STMicroelectronics |
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TDA8138 データシート(HTML) 3 Page - STMicroelectronics |
3 / 6 page ELECTRICAL CHRACTERISTICS (VIN1 = 7V, VIN2 = 14V, Tj = 25 oC, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit VO1 Output Voltage IO1 = 10mA 5 5.1 5.2 V VO2 Output Voltage IO2 = 10mA 11.76 12 12.24 V VO1 Output Voltage 7V < VIN1 < 14V 14 < VIN2 < 18V 5mA < IO1,2 < 750mA 4.9 5.3 V VO2 Output Voltage 11.5 12.5 V VIO1,2 Dropout Voltage IO1,2 = 750mA IO1,2 = 1A 1.4 2 V V VO1,2LI Line Regulation 7V < VIN1 < 14V 14 < VIN2 < 18V IO1,2 = 200mA 50 120 mV mV VO1,2LO Load Regulation 5mA < IO1 < 0.6A 5mA < IO2 < 0.6A 100 250 mV mV IQ Quiescent Current IO1 = 10mA Output 2 Disabled 2mA VO1RST Reset Thrseshold Voltage K = VO1 K - 0.4 K - 0.25 K - 0.1 V VRTH Reset Thrseshold Hysteresis See circuit description 20 50 75 mV tRD Reset Pulse Delay Ce = 100nF See circuit description 25 ms VRL Saturation Voltage in Reset Condition I5 = 5mA 0.4 V IRH Leakage Current in Normal Condition (at Pin 6 for SIP9 or Pin 5 for Heptawatt) V5 = 10V 10 µA KO1,2 Output Voltage Thermal Drift Tj = 0 to 125 oC KO = ∆VO ⋅ 106 ∆T ⋅ VO 100 ppm/ oC IO1,2SC Short Circuit Output Current VIN1 = 7V, VIN2 = 14V VIN1,2 = 16V (see Note) 1.6 1 A A VDISH Disable Voltage High (out 2 active) 2 V VDISL Disable Voltage Low (out 2 disabled) 0.8 V IDIS Disable Bias Current 0V < VDIS < 7V -100 2 µA Tjsd Junction Temperature for Thermal Shut Down 145 oC Note : Safe permanent short-circuit is only guaranteed for input voltages up to 16V. The TDA8138 is a dual voltage regulator with Reset and Disable (TD8138A : Disable only, TDA8138B : Reset only). The two regulation parts are supplied from one voltage reference circuit trimmed by zener zap during EWS test. Since the supply voltage of this last is connected at Pin 1 (VIN1), the regulator 2 will not work if Pin 1 is not supplied. The outputs stage have been realized in darlington configuration with a drop typical 1.2V. The disable circuit, switch-off the output 2 if a voltage lower than 0.8V is applied at Pin 3 (Heptawatt) or Pin 4 (SIP9) The Reset circuit checks the voltage at the out- put 1. If this one goes below VOUT - 0.25V (4.85V typ.), the comparator "a" (see Figure 1) discharges rapidly the capacitor Ce and the reset output goes at once Low. When the voltage at the out1 rises above VOUT - 0.2V (4.9V typ.), the voltage VCe increases linearly to 2.5V corresponding to a delay td following the law : t1 = Ce ⋅ 2.5V 10 µA (see Figure 2), then the reset output goes high again. To avoid gliches in the reset output, the second comparator "b" has a large hysteresis (1.9V). CIRCUIT DESCRIPTION TDA8138 3/6 |
同様の部品番号 - TDA8138 |
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同様の説明 - TDA8138 |
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