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SI5857DU-T1-GE3 データシート(PDF) 2 Page - Vishay Siliconix |
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SI5857DU-T1-GE3 データシート(HTML) 2 Page - Vishay Siliconix |
2 / 10 page www.vishay.com 2 Document Number: 73696 S-81449-Rev. C, 23-Jun-08 Vishay Siliconix Si5857DU Notes: a. Package limited. b. Surface Mounted on FR4 Board. c. t ≤ 5 s. d. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under Steady State conditions for MOSFETS is 105 °C/W. g. Maximum under Steady State conditions for Schottky is 110 °C/W. THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambient (MOSFET)b, f RthJA 43 55 °C/W Maximum Junction-to-Case (Drain) (MOSFET) RthJC 9.5 12 Maximum Junction-to-Ambient (Schottky)b, g RthJA 49 61 Maximum Junction-to-Case (Drain) (Schottky) RthJC 13 16 SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = - 250 µA - 20 V VDS Temperature Coefficient ΔV DS/TJ ID = - 250 µA - 19 mV/°C VGS(th) Temperature Coefficient ΔV GS(th)/TJ 2.6 Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = - 250 µA - 0.6 - 1.5 V Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 12 V ± 100 ns Zero Gate Voltage Drain Current IDSS VDS = - 20 V, VGS = 0 V - 1 µA VDS = - 20 V, VGS = 0 V, TJ = 55 °C - 10 On-State Drain Currenta ID(on) VDS ≤ - 5 V, VGS = - 4.5 V - 20 A Drain-Source On-State Resistancea RDS(on) VGS = - 4.5 V, ID = - 3.6 A 0.048 0.058 Ω VGS = - 2.5 V, ID = - 1 A 0.081 0.100 Forward Transconductancea gfs VDS = - 10 V, ID = - 3.6 A 10 S Dynamicb Input Capacitance Ciss VDS = - 10 V, VGS = 0 V, f = 1 MHz 480 pF Output Capacitance Coss 125 Reverse Transfer Capacitance Crss 90 Total Gate Charge Qg VDS = - 10 V, VGS = - 10 V, ID = - 5 A 11 17 nC VDS = - 10 V, VGS = - 4.5 V, ID = - 5 A 5.5 8.5 Gate-Source Charge Qgs 1.2 Gate-Drain Charge Qgd 1.8 Gate Resistance Rg f = 1 MHz 9 Ω Turn-On Delay Time td(on) VDD = - 10 V, RL = 2.5 Ω ID ≅ - 4 A, VGEN = - 4.5 V, Rg = 1 Ω 11 20 ns Rise Time tr 42 65 Turn-Off Delay Time td(off) 33 50 Fall Time tf 50 75 Turn-On Delay Time td(on) VDD = - 10 V, RL = 2.5 Ω ID ≅ - 4 A, VGEN = - 10 V, Rg = 1 Ω 510 Rise Time tr 15 25 Turn-Off Delay Time td(off) 25 40 Fall Time tf 10 20 |
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同様の説明 - SI5857DU-T1-GE3 |
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