TDA9105 datasheet(7/32 Pages) STMICROELECTRONICS

部品番号	TDA9105

部品情報	DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

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VERTICAL SECTION

Operating Conditions

Symbol

Parameter

Min.

Typ.

Max.

Unit

VSVR

Vertical Sync Input Voltage (Pin 34)

0

5.5

V

VEWM

Maximum EW Output Voltage (Pin 37)

6.5

V

VDHPCM

Maximum Dynamic Horizontal Phase Control Output Voltage (Pin 40)

6.5

V

VDHPCm

Minimum Dynamic Horizontal Phase Control Output Voltage (Pin 40)

0.9

V

VDFm

Minimum Vertical Dynamic Focus Output Voltage (Pin 1)

0.9

V

Rload

Minimum Load for less than 1% Vertical Amplitude Drift (Pin 25)

65

M

Ω

Electrical Characteristics (VCC = 12V, Tamb =25

°C)

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

IBIASP

Bias Current (current sourced by PNP Base)

(Pins 28-29)

For V28-29 =2V

2

µA

IBIASN

Bias Current (Pin 31) (sinked by NPN base)

For V31 = 6V

0.5

µA

VSth

Vertical Sync Input Threshold Voltage (Pin 34)

High-level

Low-level

2

0.8

V

VSBI

Vertical Sync Input Bias Current

(Current Sourced by PNP Base)

V34 = 0.8V

1

µA

VRB

Voltage at Ramp Bottom Point (Pin 27)

2/8

VREF-V

VRT

Voltage at Ramp Top Point (with Sync) (Pin 27)

5/8

VREF-V

VRTF

Voltage at Ramp Top Point (without Sync) (Pin

27)

VRT-0.1

V

VSW

Minimum Vertical Sync Pulse Width (Pin 34)

5

µS

VSmDut

Vertical Sync Input Maximum Duty-cycle

(Pin 34)

15

%

VSTD

Vertical Sawtooth Discharge Time Duration

(Pin 27)

With 150nF cap

70

µS

VFRF

Vertical Free Running Frequency

V28 = 2V, V29 grounded,

Measured on Pin 27

Cosc (Pin27) = 150nF

100

Hz

ASFR

AUTO-SYNC Frequency (see Note 1)

With C27 = 150nF

50

165

Hz

RAFD

Ramp Amplitude Drift Versus Frequency

V31 = 6V, C27 = 150nF

50Hz < f < 165Hz

100

ppm/Hz

Rlin

Ramp Linearity on Pin 30

V28,V29 grounded

0.5

%

Vpos

Vertical Position Adjustment Voltage (Pin 32)

V33 =2V

V33 =4V

V33 = 6V

3.65

3.2

3.5

3.8

3.3

V

IVPOS

Max Current on Vertical Position Control

Output (Pin 32)

±2mA

VOR

Vertical Output Voltage (Pin 30)

(peak-to-peak voltage on Pin 30)

V31 =2V

V31 =4V

V31 = 6V

3.75

2

3

4

2.2

V

VOUTDC

DC Voltage on Vertical Output (Pin30)

See Note 2

7/16

VREF-V

V0I

Vertical Output Maximum Current (Pin 30)

±5mA

dVS

Max Vertical S-Correction Amplitude

V28 = 2V inhibits S-CORR

V28 = 6V gives maximum S-CORR

∆V/V30pp at T/4

∆V/V30pp at 3T/4

TBD

-4

+4

TBD

%

Ccorr

Max Vertical C-Correction Amplitude

V29 =2V

V29 =4V

V29 = 6V

TBD

-5

0

+5

TBD

%

VFly Th

Vertical Flyback Threshold (Pin 36)

1

TBD

V

VFly Inh

Inhibition of Vertical Flyback Input (Pin 36)

See Note 1

VREF- 0.5

V

IBIAS DCIN

Bias Current (Pin 35) (sourced by PNP base)

For V35 =V32

2

µA

Notes : 1. It is the frequency range for which the VERTICAL OSCILLATOR will automatically synchronize, using a single capacitor value on

Pin 27 and with a constant ramp amplitude.

2. Typically 3.5V for Vertical reference voltage typical value (8V).

TDA9105

7/32

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