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AD5522 データシート(PDF) 52 Page - Analog Devices |
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AD5522 データシート(HTML) 52 Page - Analog Devices |
52 / 60 page AD5522 Rev. A | Page 52 of 60 READBACK OF PMU REGISTER The PMU register readback function is a 24-bit word that includes the mode and PMU data bits. Only one PMU register can be read back at any one time. Table 31. PMU Register Readback Bit Bit Name Description 23 (MSB) MODE1 Set the MODE1 and MODE0 bits to 0 to access the selected PMU register. 22 MODE0 PMU Register Specific Bits 21 CH EN Channel enable. If this bit is high, the selected channel is enabled; if this bit is low, the channel is disabled. 20 FORCE1 These bits indicate which force mode the selected channel is in. 00 = FV and current clamp (if clamp is enabled). 01 = FI and voltage clamp (if clamp is enabled). 10 = high-Z FOHx voltage. 11 = high-Z FOHx current. 19 FORCE0 18 Reserved 0 17 C2 These three bits indicate which forced or measured current range is set for the selected channel. See Table 25. 16 C1 15 C0 14 MEAS1 These bits indicate which measure mode is selected: voltage, current, temperature sensor, or high-Z. 00 = MEASOUTx is connected to ISENSE. 01 = MEASOUTx is connected to VSENSE. 10 = MEASOUTx is connected to the temperature sensor. 11 = MEASOUTx is high-Z (SW12 open). 13 MEAS0 12 FIN This bit shows the status of the force input (FIN) amplifier. 0 = input of the force amplifier switched to GND. 1 = input of the force amplifier connected to the FIN DAC output. 11 SF0 The system force and sense lines can be connected to any of the four PMU channels. These bits indicate whether the system force and sense lines are switched in. See Table 25. 10 SS0 9 CL Read back the status of the individual current clamp enable bits. 1 = clamp is enabled on this channel. 0 = clamp is disabled on this channel. When reading back information about the status of the current clamp enable function, the data that was most recently written to the current clamp register from either the system control register or the PMU register is available in the readback word. 8 CPOLH Read back the status of the comparator output enable bit. 1 = PMU comparator output is enabled. 0 = PMU comparator output is disabled. When reading back information about the status of the comparator output enable function, the data that was most recently written to the comparator register from either the system control register or the PMU register is available in the readback word. 7 COMPARE V/I 1 = compare voltage function is enabled on the selected channel. 0 = compare current function is enabled on the selected channel. 6 LTMPALM TMPALM corresponds to the open-drain TMPALM output pin that flags a temperature event exceeding the default or user programmed level. The temperature alarm is a per-device alarm; the latched (LTMPALM) and unlatched (TMPALM) bits indicate whether a temperature event occurred and whether the alarm still exists (that is, whether the junction temperature still exceeds the programmed alarm level). To reset an alarm event, the user must write a 1 to the clear bit (Bit 6) in the PMU register. 5 TMPALM 4 to 0 (LSB) Unused readback bits Loads with zeros. |
同様の部品番号 - AD5522 |
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同様の説明 - AD5522 |
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