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AD5762RCSUZ データシート(PDF) 6 Page - Analog Devices |
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AD5762RCSUZ データシート(HTML) 6 Page - Analog Devices |
6 / 32 page AD5762R Rev. 0 | Page 6 of 32 AC PERFORMANCE CHARACTERISTICS AVDD = 11.4 V to 16.5 V, AVSS = −11.4 V to −16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFA, REFB= 5 V external; DVCC1 = 2.7 V to 5.25 V, RLOAD = 10 kΩ, CL = 200 pF. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter Min Typ Max Unit Test Conditions/Comments DYNAMIC PERFORMANCE2 Output Voltage Settling Time 8 10 μs Full-scale step to ±1 LSB 2 μs 512 LSB step settling Slew Rate 5 V/μs Digital-to-Analog Glitch Energy 8 nV-sec Glitch Impulse Peak Amplitude 25 mV Channel-to-Channel Isolation 80 dB DAC-to-DAC Crosstalk 8 nV-sec Digital Crosstalk 2 nV-sec Digital Feedthrough 2 nV-sec Effect of input bus activity on DAC outputs Output Noise (0.1 Hz to 10 Hz) 0.1 LSB p-p Output Noise (0.1 Hz to 100 kHz) 45 μV rms 1/f Corner Frequency 1 kHz Output Noise Spectral Density 60 nV/√Hz Measured at 10 kHz Complete System Output Noise Spectral Density3 80 nV/√Hz Measured at 10 kHz 1 To guarantee a successful readback operation over the full operating temperature range, DVCC must be restricted to within a range of 2.7 V to 3.63 V. 2 Guaranteed by design and characterization; not production tested. 3 Includes noise contributions from integrated reference buffers,16-bit DAC, and output amplifier. |
同様の部品番号 - AD5762RCSUZ |
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同様の説明 - AD5762RCSUZ |
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