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ADE5169 データシート(PDF) 11 Page - Analog Devices

部品番号 ADE5169
部品情報  Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
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ADE5169 データシート(HTML) 11 Page - Analog Devices

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ADE5166/ADE5169
Rev. 0 | Page 11 of 148
Table 8. SPI Master Mode Timing (SPICPHA = 0) Parameters
Parameter
Description
Min
Typ
Max
Unit
tSL
SCLK low pulse width
2SPIR × tCORE1
(SPIR + 1) × tCORE1
ns
tSH
SCLK high pulse width
2SPIR × tCORE1
(SPIR + 1) × tCORE1
ns
tDAV
Data output valid after SCLK edge
3 × tCORE1
ns
tDOSU
Data output setup before SCLK edge
75
ns
tDSU
Data input setup time before SCLK edge
0
ns
tDHD
Data input hold time after SCLK edge
tCORE1
ns
tDF
Data output fall time
19
ns
tDR
Data output rise time
19
ns
tSR
SCLK rise time
19
ns
tSF
SCLK fall time
19
ns
1 tCORE depends on the clock divider or CD[2:0] bits of the POWCON SFR, Address 0xC5 (see Table 25); tCORE = 2CD/4.096 MHz.
SCLK
(SPICPOL = 0)
tDSU
SCLK
(SPICPOL = 1)
MOSI
MISO
MSB
LSB
LSB IN
BITS [6:1]
BITS [6:1]
tDHD
tDR
tDAV
tDF
tDOSU
tSH
tSL
tSR
tSF
MSB IN
Figure 5. SPI Master Mode Timing (SPICPHA = 0)


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