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ADV3002BSTZ-RL データシート(PDF) 1 Page - Analog Devices |
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ADV3002BSTZ-RL データシート(HTML) 1 Page - Analog Devices |
1 / 28 page 4:1 HDMI/DVI Switch with Equalization, DDC/CEC Buffers and EDID Replication ADV3002 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,nor for anyinfringements ofpatents orother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. FEATURES 4 inputs, 1 output HDMI/DVI links ±8 kV ESD protection on input pins HDMI 1.3a receive and transmit compliant Supports 250 Mbps to 2.25 Gbps data rates and beyond Supports 25 MHz to 225 MHz pixel clocks and beyond Fully buffered unidirectional inputs/outputs Switchable 50 Ω on-chip input terminations with manual or automatic control on channel switch Equalized inputs with low added jitter compensate for more than 20 meters of HDMI cable at 2.25 Gbps Loss of signal (LOS) detect circuit on TMDS clock Output disable feature for reduced power dissipation Bidirectional DDC buffers (SDA and SCL) EDID replication reduces component count, while enabling simultaneous access to all HDMI sources 5 V combiner provides power to EDID replicator and CEC buffer when local system power is off Bidirectional buffered CEC line with integrated pull-up resistors (26 kΩ) Hot plug detect pulse low on channel switch with programmable pulse width or direct manual control Standards compatible: HDMI, DVI, HDCP, I2C 80-lead, 14 mm × 14 mm LQFP RoHS-compliant package APPLICATIONS Advanced television (HDTV) sets Projectors A/V receivers Set-top boxes GENERAL DESCRIPTION The ADV3002 is a complete HDMI™/DVI link switch featuring equalized transition minimized differential signaling (TMDS) inputs, ideal for systems with long cable runs. The ADV3002 includes bidirectional buffering for the DDC bus and CEC line, with integrated pull-up resistors for the CEC line. Additionally, the ADV3002 includes an EDID replication function that enables one EDID EEPROM to be shared for all four HDMI ports. The ADV3002 is provided in a space-saving, 80-lead LQFP surface-mount Pb-free plastic package and is specified to operate over the 0°C to 85°C temperature range. FUNCTIONAL BLOCK DIAGRAM SERIAL I2C_SDA I2C_SCL I2C_ADDR[1:0] AVCC AVCC CEC_IN IN_x_CLK+ IN_x_CLK– IN_x_DATA2+ IN_x_DATA2– IN_x_DATA1+ IN_x_DATA1– IN_x_DATA0+ IN_x_DATA0– DDC_xxx_A DDC_xxx_B DDC_xxx_C DDC_xxx_D P5V_A P5V_B P5V_C P5V_D HPD_A HPD_B HPD_C HPD_D HOT PLUG DETECT EDID DDC/CEC TMDS EDID EEPROM INTERFACE ADV3002 4 4 2 4 4 4 2 2 2 2 2 2 4 4 + – + – + – + – + – + – + – + – AVCC AVCC AVCC AVEE OUT_CLK+ OUT_CLK– OUT_DATA2+ OUT_DATA2– OUT_DATA1+ OUT_DATA1– OUT_DATA0+ OUT_DATA0– DDC_SCL_COM, DDC_SDA_COM CEC_OUT EDID_ENABLE EDID_SCL, EDID_SDA AMUXVCC BIDIRECTIONAL SEL[1:0] TX_EN RESETB CONFIG INTERFACE CONTROL LOGIC LOS EQ SWITCH CORE SWITCH CORE 3.3V 3.3V REPLICATOR CONTROL 5V COMBINER HPD CONTROL PARALLEL Figure 1. PRODUCT HIGHLIGHTS 1. Input cable equalizer enables use of long cables at the input. For a 24 AWG cable, the ADV3002 compensates for more than 20 m at data rates up to 2.25 Gbps. 2. Auxiliary multiplexer isolates and buffers the DDC bus and the CEC line, increasing total system capacitance limit. 3. EDID replication eliminates the need for multiple EDID EEPROMs. EDID can be loaded from a single external EEPROM or from a system microcontroller. 4. 5 V power combiner powers the EDID replicator and CEC buffer when local system power is off. 5. Integrated hot plug detect pulse low on channel switch with programmable pulse width or direct manual control. |
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