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CDB42L52 データシート(PDF) 2 Page - Cirrus Logic

部品番号 CDB42L52
部品情報  2Low-power, Stereo CODEC w/ Headphone & Speaker Amps
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メーカー  CIRRUS [Cirrus Logic]
ホームページ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CDB42L52 データシート(HTML) 2 Page - Cirrus Logic

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2
DS680F1
CS42L52
5/13/08
System Features
12, 24, and 27 MHz Master Clock Support in
Addition to Typical Audio Clock Rates
High-performance 24-bit Converters
Multi-bit Delta-Sigma Architecture
Very Low 64Fs Oversampling Clock Reduces
Power Consumption
Low-power Operation
Stereo Analog Passthrough: 10 mW @ 1.8 V
Stereo Playback: 14 mW @ 1.8 V
Stereo Rec. and Playback: 23 mW @ 1.8 V
Variable Power Supplies
1.8 V to 2.5 V Digital & Analog
1.6 V to 5 V Class D Amplifier
1.8 V to 2.5 V Headphone Amplifier
1.8 V to 3.3 V Interface Logic
Power-down Management
ADC, DAC, CODEC, MIC Pre-Amplifier, PGA,
Headphone Amplifier, Speaker Amplifier
Analog & Digital Routing/Mixes:
Line/Headphone Out = Analog In (ADC
Bypassed)
Line/Headphone/Speaker
Out = ADC + Digital In
Digital Out = ADC + Digital In
Internal Digital Loopback
Mono Mixes
Flexible Clocking Options
Master or Slave Operation
High-impedance Digital Output Option (for easy
MUXing between CODEC & other data
sources)
Quarter-speed Mode - (i.e. allows 8 kHz Fs
while maintaining a flat noise floor up to 16 kHz)
4 kHz to 96 kHz Sample Rates
I²C® Control Port Operation
Headphone/Speaker Detection Input
Pop and Click Suppression
Applications
Digital Voice Recorders, Digital Cameras, &
Camcorders
PDA’s
Personal Media Players
Portable Game Consoles
General Description
The CS42L52 is a highly integrated, low-power stereo CO-
DEC with headphone and Class D speaker amplifiers. The
CS42L52 offers many features suitable for low-power, porta-
ble system applications.
The ADC input path allows independent channel control of a
number of features. Input summing amplifiers mix and select
line-level and/or microphone-level inputs for each channel.
The microphone input path includes a selectable programma-
ble-gain pre-amplifier stage and a low-noise MIC bias voltage
supply. A PGA is available for line or microphone inputs and
provides analog gain with soft-ramp and zero-cross transi-
tions. The ADC also features a digital volume control with soft
ramp transitions. A programmable ALC and Noise Gate mon-
itor
the
input
signals
and
adjust
the
volume
levels
appropriately. To conserve power, the ADC may be bypassed
while still allowing full analog volume control.
The DAC output path includes a digital signal processing en-
gine with various fixed-function controls. Tone Control
provides bass and treble adjustment of four selectable corner
frequencies. The Digital Mixer provides independent volume
control for both the ADC output and PCM input signal paths,
as well as a master volume control. Digital Volume controls
may be configured to change on soft-ramp transitions while
the analog controls can be configured to occur on every zero
crossing. The DAC also includes de-emphasis, limiting func-
tions and a BEEP generator, delivering tones selectable
across a range of two full octaves.
The stereo headphone amplifier is powered from a separate
positive supply and the integrated charge pump provides a
negative supply. This allows a ground-centered, analog output
with a wide signal swing and eliminates external DC-blocking
capacitors.
The Class D stereo speaker amplifier does not require an
external filter and provides the high-efficiency amplification re-
quired by power-sensitive portable applications. The speaker
amplifier may be powered directly from a battery while the in-
ternal DC supply monitoring and compensation provides a
constant gain level as the battery’s voltage decays.
In addition to its many features, the CS42L52 operates from a
low-voltage analog and digital core making it ideal for portable
systems that require extremely low power consumption in a
minimal amount of space.
The CS42L52 is available in a 40-pin QFN package in both
Commercial (-40 to +85 °C) and Automotive (-40 to +105 °C)
grades. The CS42L52 Customer Demonstration board is also
available for device evaluation and implementation sugges-
tions. Please refer to “Ordering Information” on page 81 for
complete ordering information.


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