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CDCS502PW データシート(PDF) 6 Page - Texas Instruments

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部品番号 CDCS502PW
部品情報  Crystal Oscillator / Clock Generator with optional SSC
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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CDCS502PW データシート(HTML) 6 Page - Texas Instruments

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APPLICATION INFORMATION
SELECTION OF A CRYSTAL
SSC MODULATION
PARAMETER MEASUREMENT INFORMATION
10pF
LVCMOS
CDCS502
VDD
1kW
1kW
LVCMOS
LVCMOS
SeriesTermination
~18
TypicalDriver
Impedance
~ 32
CDCS502
Z =50W
L
CDCS502
SCAS868 – DECEMBER 2008........................................................................................................................................................................................... www.ti.com
The CDCS502 requires a crystal with a frequency between 8 and 32 MHz (27MHz in x4 Mode). The crystal stage
is designed with an internal load capacitance of 10pF for crystals with this shunt load capacitance. If a slightly
bigger capacity then 10pF is needed, small external capacitors can be used to get to this value. This solution
however might influence the power-up behavior of the crystal stage, so using a 10pF load capacitance crystal is
highly recommended.
For further details on capacitive load calculation, see application report (SCAA085).
NOTE:
Even though the CDCS502 is characterized down to –40°C, a standard crystal is
usually not rated for operation at this low temperature.
The exact implementation of the SSC modulation plays a vital role for the EMI reduction. The CDCS502 uses a
triangular modulation scheme implemented in a way that the modulation frequency depends on the VCO
frequency of the internal PLL and the spread amount is independent from the VCO frequency.
The modulation frequency can be calculated by using one of the below formulas chosen by frequency
multiplication mode.
FS =0: fmod = fIN / 708
FS =1: fmod = fIN / 620
Figure 3. Test Load
Figure 4. Test Load for 50-
Ω Board Environment
6
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): CDCS502


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