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TC7117AIJL データシート(PDF) 6 Page - TelCom Semiconductor, Inc |
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TC7117AIJL データシート(HTML) 6 Page - TelCom Semiconductor, Inc |
6 / 14 page 3-208 TELCOM SEMICONDUCTOR, INC. TC7116 TC7116A TC7117 TC7117A PIN DESCRIPTION (Cont.) 40-Pin CerDIP 44-Pin 40-Pin PDIP Plastic Quad Pin Number Flat Package Normal Pin Number Symbol Description 33 41 C – REF See pin 34. 34 42 C + REF A 0.1 µF capacitor is used in most applications. If a large, common-mode voltage exists (e.g., the VIN – pin is not at analog common), and a 200 mV scale is used, a 1 µF capacitor is recommended and will hold the roll-over error to 0.5 count. 35 43 V+ Positive power supply voltage. 36 44 V + REF The analog input required to generate a full-scale output (1999 counts). Place 100 mV between pins 32 and 36 for 199.9 mV full scale. Place 1V between pins 32 and 36 for 2V full scale. See paragraph on Reference Voltage. 37 3 TEST Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display should read –1888. It may also be used as a negative supply for externally- generated decimal points. See Test paragraph for more details. 38 4 OSC3 See pin 40. 39 6 OSC2 See pin 40. 40 7 OSC1 Pins 40, 39 and 38 make up the oscillator section. For a 48 kHz clock (3 readings per sec), connect pin 40 to the junction of a 100 k Ω resistor and a 100 pF capacitor. The 100 k Ω resistor is tied to pin 39 and the 100 pF capacitor is tied to pin 38. 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS WITH HOLD |
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同様の説明 - TC7117AIJL |
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