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MC-ACT-VME2416-VHD データシート(PDF) 5 Page - Actel Corporation

部品番号 MC-ACT-VME2416-VHD
部品情報  FlexibleslaveVMEcontroller Fullinterruptcontroller(ROAK
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メーカー  ACTEL [Actel Corporation]
ホームページ  http://www.actel.com
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MC-ACT-VME2416-VHD データシート(HTML) 5 Page - Actel Corporation

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VME2416
Memec Design
February 25, 2003
5
Optimized for
Signal Descriptions
The following signal descriptions define the IO signals.
Signal
Direction
Description
CLK
Input
Clock: System clock. This clock is provided by the user side interface which is
part of the 40MHz clock domain.
RESET_N
Input
System reset: Asynchronous system reset, active low.
VME_ADDR[23:1]
Input
VME Address Bus: The smallest addressable unit is the byte location. Masters
use address lines to select the data which has to be accessed
VME_AM[5:0]
Input
VME Address Modifier Bus: Allow the master to pass additional binary
information to the slave during data transfer cycles.
VME_DATA_IN[15:0]
Input
VME Data Bus In: 16 write data lines are available. Depending on the control
signals, only one byte can be used for the transfer on the user part.
VME_DATA_OUT[15:0]
Output
VME Data Bus Out: 16 read data lines. For each access, the 16 data bits are
read.
VME_EXT_DRV_N
Output
VME External Data Drive: Active low drive enable signal for external bidirectional
data bus drivers.
VME_INT_DRV_N
Output
VME Internal Data Drive: Active low drive enable signal for internal bidirectional
data bus drivers.
VME_EXT_DDIR
Output
VME External Data Direction: Direction control signal for internal bidirectional
data bus drivers. High indicates data to VME bus and low from VME bus.
VME_LWORD_N
Input
VME Long Word: Active low signal indicating long word access. This signal is not
used in the MC-ACT-VME2416.
VME_DTACK_N
Output
VME Data Acknowledge: This active low signal acknowledges the data transfer.
It has to be connected to an open collector driver.
VME_AS_N
Input
VME Address Strobe: clocks with falling edge the internal synchronization
signals like VME_ADDR and VME_AM. It is also used as data signal for access
start detection.
VME_DS0_N
Input
VME Data Strobe 0: Active low signal used for the selected location part of the
data. Data strobe 0 is dedicated to the data[7:0].
VME_DS1_N
Input
VME Data Strobe 1: Active low signal used for the selected location part of the
data. Data strobe 1 is dedicated to the data[15:8].
VME_WRITE_N
Input
VME Read/Write: Active low signal which is used by the master to indicate the
data direction.
VME_BERR_N
Input
VME Bus Error: Active low signal driven by other modules indicating that the data
transfer was unsuccessful.
VME_IACK_N
Input
VME Interrupt Acknowledge: When driven low, the VME_IACKIN_N causes the
IACK daisy-chain driver, located in slot 1, to propagate a falling edge down the
interrupt acknowledge daisy-chain.
VME_IACKIN_N
Input
VME Interrupt Acknowledge Input Daisy-Chain: This active low signal is used
as input of the module for the daisy-chain interrupt acknowledge.
VME_IACKOUT_N
Output
VME Interrupt Acknowledge Output Daisy-Chain: This active low signal is used
as output of the module for the daisy-chain interrupt acknowledge.
VME_IRQ_N[6:0]
Output
VME Interrupt Request Lines: Interrupters request interrupts by driving an
interrupt request line low. VME_IRQ_N[7] has the highest priority. These signals
have to be connected to open collector drivers.
INT_USER_ADDR[23:1]
Output
Registered VME Address Bus: Synchronized on the falling edge of VME_AS_N.
This bus is used to decode the address and to active an access signal on the user
part.
INT_USER_AM[5:0]
Output
Registered VME Address Modifier Bus: Synchronized on the falling edge of
VME_AS_N. This bus is used to decode the address modifier and to active an
access signal on the user part.
USER_ACCESS
Input
User Access Signal: The user has 50 ns time to decode the address and
asserting the USER_ACCESS signal when addressed.


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