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TL16C750PM データシート(PDF) 3 Page - Texas Instruments |
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TL16C750PM データシート(HTML) 3 Page - Texas Instruments |
3 / 35 page TL16C750 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH 64-BYTE FIFOs AND AUTOFLOW CONTROL SLLS191C – JANUARY 1995 – REVISED DECEMBER 1997 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram Receiver Buffer Register Divisor Latch (LS) Divisor Latch (MS) Baud Generator Receiver FIFO Line Status Register Transmitter Holding Register Modem Control Register Modem Status Register Line Control Register Transmitter FIFO Interrupt Enable Register Interrupt Identification Register FIFO Control Register Select and Control Logic Interrupt Control Logic S e l e c t Data Bus Buffer BAUDOUT SIN RCLK SOUT CTS DTR DSR DCD RI OUT1 OUT2 INTRPT 40 37 41 42 43 38 35 33 13 10 11 17 14 A0 31 D(7 – 0) 9–2 Internal Data Bus 30 29 15 16 28 39 24 25 20 21 26 27 18 19 32 A1 A2 CS0 CS1 CS2 ADS MR RD1 RD2 WR1 WR2 DDIS TXRDY XIN XOUT RXRDY S e l e c t Receiver Shift Register Receiver Timing and Control Transmitter Timing and Control Transmitter Shift Register Modem Control Logic 8 44 22 VCC VSS Power Supply RTS 36 Autoflow Control Enable (AFE) 8 8 8 8 8 8 8 NOTE A: Terminal numbers shown are for the FN package. |
同様の部品番号 - TL16C750PM |
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同様の説明 - TL16C750PM |
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