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TP3056BN データシート(PDF) 1 Page - Texas Instruments |
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TP3056BN データシート(HTML) 1 Page - Texas Instruments |
1 / 19 page TP3056B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER SLWS072A – MAY 1998 – REVISED AUGUST 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Complete PCM Codec and Filtering Systems Include: – Transmit High-Pass and Low-Pass Filtering – Receive Low-Pass Filter With (sin x)/x Correction – Active RC Noise Filters – µ-Law and A-Law Compatible Coder and Decoder – Internal Precision Voltage Reference – Serial I/O Interface – Internal Autozero Circuitry D µ-Law/A-Law Operation Pin-Selectable D ±5-V Operation D Low Operating Power . . . 60 mW Typ D Power-Down Mode ...5 mW Typ D Automatic Power Down D TTL- or CMOS-Compatible Digital Interface D Maximizes Line Interface Card Circuit Density description The TP3056B monolithic serial interface combined PCM codec and filter device is comprised of a single-chip PCM codec (pulse code-modulated encoder and decoder) and analog filters. This device provides all the functions required to interface a full-duplex (2-wire) voice telephone circuit with a TDM (time-division-multiplexed) system. Primary applications include: • Line interface for digital transmission and switching of T1/E1 carrier, PABX, and central office telephone systems • Subscriber line concentrators • Digital-encryption systems • Digital voice-band data-storage systems • Digital signal processing The TP3056B is designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A conversion), and the appropriate filtering of analog signals in a PCM system. This device is intended to be used at the analog termination of a PCM line or trunk. It requires a master clock of 2.048 MHz, a transmit/receive data clock that is synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive frame-sync pulses. The TP3056B contains patented circuitry to achieve low transmit channel idle noise and is not recommended for applications in which the composite signals on the transmit side are below – 55 dBm0. This device, available in 16-pin N PDIP (plastic dual-in-line package) and 16-pin DW SOIC (small outline IC) packages, is characterized for operation from 0 °C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VBB ANLG GND VFRO VCC FSR DR ASEL PDN VFXI + VFXI – GSX TSX FSX DX BCLK MCLK DW OR N PACKAGE (TOP VIEW) |
同様の部品番号 - TP3056BN |
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同様の説明 - TP3056BN |
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