TP3064A, TP3067A, TP13064A, TP13067A

MONOLITHIC SERIAL INTERFACE

COMBINED PCM CODEC AND FILTER

SCTS025C – SEPTEMBER 1992 –REVISED JULY 1996

6

POST OFFICE BOX 655303

analog interface with power amplifiers

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

II

Input current

VPI = – 1 V to 1 V

±100

nA

ri

Input resistance

VPI = – 1 V to 1 V

10

M

Ω

ro

Output resistance

VPO+ or VPO–

Inverting unity gain

1

Ω

AV

Voltage amplification

VPO– or VPO+

VPO – = 1.77 Vrms,

RL = 600 Ω

–1

BI

Unity-gain bandwidth

VPO–

Open loop

400

kHz

VIO

Input offset voltage

±25

mV

kSVR

Supply voltage rejection ratio of VCC or VBB VPO connected to VPI

0 kHz to 4 kHz

60

dB

kSVR

Supply-voltage rejection ratio of VCC or VBB VPO – connected to VPI

4 kHz to 50 kHz

36

dB

RL

Load resistance

Connected from VPO+ to VPO –

600

Ω

CL

Load capacitance

100

pF

† All typical values are at VCC = 5 V, VBB = –5 V, and TA = 25°C.