PACKAGE INFORMATION

ZAL Package

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SN74SSQEA32882

The package is an 8-mm × 13.5-mm, 176-pin ball grid array (BGA) with 0.65-mm ball pitch in an 11 × 20 grid.

The device pinout supports outputs on the outer two left and right columns to support easy DIMM signal routing.

Corresponding inputs are placed in such a way that two devices can be placed back-to-back for four rank

modules while the data inputs share the same vias. Each input and output is located close to an associated

no-ball position or on the outer two rows to allow for low-cost via technology combined with the small, 0.65-mm

ball pitch.

NOTE:

To request more information on SN74SSQEA32882 DDR3 Register/PLL please

contact support@ti.com .

Copyright © 2009, Texas Instruments Incorporated

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